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參數(shù)資料
| 型號： | 935196510118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | 7.50 MM, PLASTIC, SO-28 |
| 文件頁數(shù)： | 3/35頁 |
| 文件大?。?/td> | 243K |
| 代理商： | 935196510118 |
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1997 Apr 16
11
Philips Semiconductors
Product specication
8-bit microcontrollers with DTMF generator,
8 kbytes OTP and 128 bytes EEPROM
PCD3755A; PCD3755E;
PCD3755F
6.6
Musical scale frequencies
Finally, two octaves of musical scale in steps of semitones
can be realized, again assuming an oscillator frequency
fxtal = 3.58 MHz (Table 9). It is suggested to define the
frequency by the HGF register while the LGF contains
00H, disabling Low Group Frequency generation.
Table 9
Musical scale frequencies and their
implementation
Note
1. Standard scale based on A4 @ 440 Hz.
NOTE
HGF
VALUE
(HEX)
FREQUENCY (Hz)
STANDARD(1)
GENERATED
D#5
F8
622.3
622.5
E5
EA
659.3
659.5
F5
DD
698.5
697.9
F#5
D0
740.0
741.1
G5
C5
784.0
782.1
G#5
B9
830.6
832.3
A5
AF
880.0
879.3
A#5
A5
923.3
931.9
B5
9C
987.8
985.0
C6
93
1046.5
1044.5
C#6
8A
1108.7
1111.7
D6
82
1174.7
1179.0
D#6
7B
1244.5
1245.1
E6
74
1318.5
1318.9
F6
6D
1396.9
1402.1
F#6
67
1480.0
1482.2
G6
61
1568.0
1572.0
G#6
5C
1661.2
1655.7
A6
56
1760.0
1768.5
A#6
51
1864.7
1875.1
B6
4D
1975.5
1970.0
C7
48
2093.0
2103.3
C#7
44
2217.5
2223.3
D7
40
2349.3
2358.1
D#7
3D
2489.0
2470.4
7
EEPROM AND TIMER 2 ORGANIZATION
The PCD3755A, PCD3755E and PCD3755F have
128 bytes of Electrically Erasable Programmable
Read-Only Memory (EEPROM). Such non-volatile storage
provides data retention without the need for battery
backup. In telecom applications, the EEPROM is used for
storing redial numbers and for short dialling of frequently
used numbers. More generally, EEPROM may be used for
customizing microcontrollers, such as to include a PIN
code or a country code, to define trimming parameters, to
select application features from the range stored in ROM.
The most significant difference between a RAM and an
EEPROM is that a bit in EEPROM, once written to a
logic 1, cannot be cleared by a subsequent write
operation. Successive write accesses actually perform a
logical OR with the previously stored information.
Therefore, to clear a bit, the whole byte must be erased
and re-written with the particular bit cleared. Thus, an
erase-and-write operation is the EEPROM equivalent of a
RAM write operation.
Whereas read access times to an EEPROM are
comparable to RAM access times, write and erase
accesses are much slower at 5 ms each. To make these
operations more efficient, several provisions are available
in the PCD3755A, PCD3755E and PCD3755F.
First, the EEPROM array is structured into 32 four-byte
pages (see Fig.5) permitting access to 4 bytes in parallel
(write page, erase/write page and erase page). It is also
possible to erase and write individual bytes. Finally, the
EEPROM address register provides auto-incrementing,
allowing very efficient read and write accesses to
sequential bytes.
To simplify the erase and write timing, the derivative 8-bit
down-counter (Timer 2) with reload register is provided.
In addition to EEPROM timing, Timer 2 can be used for
general real-time tasks, such as for measuring signal
duration and for defining pulse widths.
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