參數(shù)資料
型號(hào): 935210470512
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 91/112頁
文件大?。?/td> 693K
代理商: 935210470512
1996 Jun 27
8
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xC592
6. Pin 55, REF:
a) Selection of input resp. output dependent of CAN Control Register bit 5 (CR.5; see Section 13.5.3 Table 32).
b) If the internal reference is used, then REF should be connected to AVSS via a capacitor with a value of ≥10 nF.
c) After an external reset (RST = HIGH) the internal 1
2AVDD source is activated and, REF is a reference output.
d) If the CAN-controller is in the reset state, e.g. after an external reset, then the 1
2AVDD source is switched off
during Power-down mode.
7. CAN-bus line:
a) CRX0 level > CRX1 level is interpreted as a logic 1 (recessive).
b) CRX0 level < CRX1 level is interpreted as a logic 0 (dominant).
8. The level of AVREF+ must be higher than that of AVREF.
Table 2
Pin description for pins with alternative functions (SOT188-2 and NO330; see note 1)
SYMBOL
PIN
DESCRIPTION
DEFAULT
ALTERNATIVE
Port 4
P4.0 to P4.7
7 to 14
8-bit quasi-bidirectional I/O port.
CMSR0
7
Compare and Set/Reset outputs for Timer T2.
CMSR1
8
CMSR2
9
CMSR3
10
CMSR4
11
CMSR5
12
CMT0
13
Compare and toggle outputs for Timer T2.
CMT1
14
Port 1
P1.0 to P1.7
16 to 21, 23, 24 8-bit quasi-bidirectional I/O port.
CT0I/INT2
16
Capture timer inputs for Timer T2,
or
External interrupt inputs.
CT1I/INT3
17
CT2I/INT4
18
CT3I/INT5
19
T2
20
T2 event input (rising edge triggered).
RT2
21
T2 timer reset input (rising edge triggered).
CTX0
23
CAN transmitter output 0 (note 2).
CTX1
24
CAN transmitter output 1 (note 2).
相關(guān)PDF資料
PDF描述
935089010512 8-BIT, 16 MHz, MICROCONTROLLER, PQCC68
935085020512 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC68
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