參數(shù)資料
型號(hào)： 935210470512
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁(yè)數(shù)： 97/112頁(yè)
文件大小： 693K
代理商： 935210470512
1996 Jun 27
85
Philips Semiconductors
Product specication
8-bit microcontroller with on-chip CAN
P8xC592
21 AC CHARACTERISTICS
See notes 1 and 2; CL = 100 pF for Port 0, ALE and PSEN; CL = 80 pF for all other outputs unless otherwise specied.
Notes
1. For the AC Characteristics the following conditions are valid: P8xC592 FFA (FHA): VDD =5V ± 10%;
Tamb = 40 to +85 °C (125 °C); fCLK = 1.2 to 16 MHz.
2.
; tCLK = 62.5 ns at fCLK = 16 MHz.
SYMBOL
PARAMETER
fCLK = 16 MHz fCLK = 12 MHz
VARIABLE CLOCK
1.2 to 16 MHz
UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
External Program Memory
tLHLL
ALE pulse width
85
127
2tCLK 40
ns
tAVLL
address valid to ALE LOW
23
43
tCLK 40
ns
tLLAX
address hold after ALE LOW
33
53
tCLK 30
ns
tLLIV
ALE LOW to valid instruction in
150
233
4tCLK 100 ns
tLLPL
ALE LOW to PSEN LOW
33
53
tCLK 30
ns
tPLPH
PSEN pulse width
143
205
3tCLK 45
ns
tPLIV
PSEN LOW to valid instruction in
83
145
3tCLK 105 ns
tPXIX
input instruction hold after PSEN
0
0
0
ns
tPXIZ
input instruction oat after PSEN
38
59
tCLK 25
ns
tAVIV
address to valid instruction in
208
312
5tCLK 105 ns
tPLAZ
PSEN LOW to address oat
10
10
10
ns
External data memory
tRLRH
RD pulse width
275
400
6tCLK 100
ns
tWLWH
WR pulse width
275
400
6tCLK 100
ns
tAVLL
address valid to ALE LOW
8
28
tCLK 55
ns
tLLAX
address hold after ALE LOW
33
53
tCLK 30
ns
tRLDV
RD LOW to valid data in
148
252
5tCLK 165
ns
tRHDX
data hold after RD
0
0
0
ns
tRHDZ
data oat after RD
55
97
2tCLK 70
ns
tLLDV
ALE LOW to valid data in
350
517
8tCLK 150 ns
tAVDV
address to valid data in
398
585
9tCLK 165 ns
tLLWL
ALE LOW to RD or WR LOW
138
238
200
300
3tCLK 50
3tCLK +50
ns
tAVWL
address valid to RD or WR LOW
120
203
4tCLK 130
ns
tWHLH
RD or WR HIGH to ALE HIGH
23
103
43
123
tCLK 40
tCLK +40
ns
tQVWX
data valid to WR transition
13
33
tCLK 50
ns
tQVWH
data valid time WR HIGH
288
433
7tCLK 150
ns
tWHQX
data hold after WR
13
33
tCLK 50
ns
tRLAZ
RD LOW to address oat
0
0
0ns
t
CLK
1
f
CLK
-----------
one oscillator clock period
==
相關(guān)PDF資料
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935089010512 8-BIT, 16 MHz, MICROCONTROLLER, PQCC68
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