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參數(shù)資料
| 型號： | 935225410112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 20/67頁 |
| 文件大?。?/td> | 400K |
| 代理商： | 935225410112 |
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1998 Apr 07
27
Philips Semiconductors
Product specication
8-bit Flash microcontrollers
P89C738; P89C739
12.2
Serial Port Control Register (SCON)
Table 17 Serial Port Control Register (SFR address 98H)
Table 18 Description of SCON bits
Table 19 Selection of the Serial Port modes
76543210
SMO
SM1
SM2
REN
TB8
RB8
TI
RI
BIT
SYMBOL
DESCRIPTION
7
SM0
These bits are used to select the Serial Port mode; see Table 19.
6
SM1
5
SM2
Enables the multiprocessor communication feature in Modes 2 and 3. In these
modes, if SM2 = 1, then RI will not be activated if the received 9th data bit (RB8) is a
logic 0. In Mode 1, if SM2 = 1, then RI will not be activated unless a valid stop bit was
received. In Mode 0, SM2 should be a logic 0.
4
REN
Enables serial reception. Set and cleared by software as required.
3
TB8
The 9th data bit that will be transmitted in Modes 2 and 3. Set or cleared by software
as required.
2
RB8
In Modes 2 and 3, RB8 is the 9th data bit received. In Mode 1, if SM2 = 0 then RB8 is
the stop bit that was received. In Mode 0, RB8 is not used.
1TI
Transmit Interrupt ag. Set by hardware at the end of the 8th bit time in Mode 0, or at
the beginning of the stop bit time in the other modes, in any serial transmission. TI must
be cleared by software.
0RI
Receive Interrupt ag. Set by hardware at the end of the 8th bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial transmission (except:
see SM2). RI must be cleared by software.
SMO
SM1
MODE
DESCRIPTION
BAUD RATE
0
Mode 0
shift register
1
12fclk
0
1
Mode 1
8-bit UART
variable
1
0
Mode 2
9-bit UART
1
32 or 164fclk
1
Mode 3
9-bit UART
variable
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