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參數(shù)資料
| 型號(hào)： | 935235160112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48 |
| 文件頁(yè)數(shù)： | 2/20頁(yè) |
| 文件大?。?/td> | 100K |
| 代理商： | 935235160112 |
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2002 Oct 02
10
Philips Semiconductors
Product specication
16-bit D-type transparent latch with 5 V
tolerant inputs/outputs (3-state)
74LVC16373A;
74LVCH16373A
handbook, full pagewidth
MGU774
th
tsu
VM
VI
GND
VI
GND
LE input
Dn input
Fig.8 Data set-up and hold times for the Dn input to the LE input.
VM = 1.5 V at VCC ≥ 2.7 V.
VM = 0.5VCC at VCC < 2.7 V.
VOL and VOH are the typical output voltage drop that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable performance.
handbook, full pagewidth
MGU775
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
VI
VOL
VOH
VCC
VM
GND
tPZL
tPZH
VM
Fig.9 3-state enable and disable times.
VM = 1.5 V at VCC ≥ 2.7 V.
VM = 0.5VCC at VCC < 2.7 V.
VX =VOL + 0.3 V at VCC ≥ 2.7 V.
VX =VOL + 0.1VCC at VCC < 2.7 V.
VY =VOH 0.3 V at VCC ≥ 2.7 V.
VY =VOH 0.1VCC at VCC < 2.7 V.
VOL and VOH are the typical output voltage drop that occur with the output load.
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