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參數(shù)資料
| 型號(hào)： | 935240230112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | VERTICAL DEFLECTION IC, PZIP13 |
| 封裝： | POWER, PLASTIC, SOT-141-6, DIL-BENT-SIL, 13 PIN |
| 文件頁數(shù)： | 17/18頁 |
| 文件大?。?/td> | 154K |
| 代理商： | 935240230112 |
1998 Sep 03
8
Philips Semiconductors
Preliminary specication
Full bridge current driven vertical deection
output circuit in LVDMOS
TDA8354Q
Notes
1. At Tj = 125 °C. The temperature coefficient of Vloss has a positive sign.
2. The linearity error is measured without S correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal into 22 equal time parts ranging from 1 to 22 inclusive. Measure the value of the voltage
across RM of two succeeding parts called one block (a) starting with part 2 and 3 (block 1) and ending with
part 20 and 21 (block 10). Thus parts 1 and 22 are unused. The equations for linearity error for adjacent blocks
(LEAB) and not adjacent blocks (LENAB) are given below:
3. Vo(A) +Vo(B) =VP. At the start of the scan this equation is one diode voltage less.
4. The V value within formulae relates to voltages at or between relative pin numbers, i.e. V9to5/V3to5 = voltage value
across pins 9 and 5 divided by voltage value across pins 3 and 5.
5. V2to5 AC short-circuited.
6. At V(ripple) = 500 mV (eff) at VP; measured across RM; f(ripple) =50Hz 1 kHz.
7. Ii(bias) +Ii(diff) ≤ 800 A and Ii(bias) Ii(diff) ≥ 50 A per pin.
G
i(T)
current gain drift as function of
temperature
104
/K
PSRR
power supply rejection ratio
note 6
80
90
dB
Input stage
Ii(bias)
signal bias current
330
500
A
Ii(diff)(p-p)
differential mode input current
(peak-to-peak value) pin 11 or 12
note 7
500
600
A
Vi(diff)
differential mode input voltage
Ii(diff) = 500 A
0.75
V
Vi(cm)
common mode input voltage
Ii(bias) = 330 A
0.95
1.15
1.35
V
Flyback switch
Io(Vb)
output peak current
t < 1.5 ms
±1.6
A
Vloss
voltage loss (Vb Vo(A))Io = +1.6 A
89V
Guard circuit
Io(guard)
output current
not active;
Vo(guard) =0V
10
A
active; Vo(guard) = 4.5 V 1
2.5
mA
Vo(guard)
output voltage on pin 1
Io(guard) = 100 A
567V
allowable voltage on pin 1
maximum leakage
current = 10
A
18
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LEAB
a
k
a
k1
+
()
–
a
av
------------------------------
=
LENAB
a
max
a
min
–
a
av
------------------------------
=
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