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參數(shù)資料
| 型號(hào)： | 935242210557 |
| 廠(chǎng)商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, SOT-322, QFP-160 |
| 文件頁(yè)數(shù)： | 79/147頁(yè) |
| 文件大?。?/td> | 526K |
| 代理商： | 935242210557 |
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1998 Apr 09
37
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
7.4.4.7
INTERRUPT
The INTERRUPT command will set the RPS_I bit of the
task in the Interrupt status register (see Table 41) if it is
executed and the condition described by the event flags is
true. The execution of RPS continues. The format of the
Interrupt command is shown in Tables 24 and 25.
The OAN bit specifies if the condition in bits 25 to 0 is an
AND (OAN set to 0) or if the condition is an OR (OAN set
to 1). If the INV bit is set this command will wait for the
condition to become false.
7.4.4.8
STOP
The STOP command will terminate the RPS execution and
reset the ERPS-bit. The command specific part of the
STOP command is like the INTERRUPT command. If the
addressed event is true the STOP will be executed
otherwise the execution will continue with the next
command. If no event is addressed the STOP will be
executed unconditionally. The format of the STOP
command is shown in Tables 26 and 27.
The OAN bit specifies if the condition in bits 25 to 0 is an
AND (OAN set to 0) or if the condition is an OR (OAN set
to 1). If the INV bit is set this command will wait for the
condition to become false.
7.4.4.9
JUMP
The JUMP command is a two Dword command.
The second Dword contains the physical address at which
the RPS will continue its execution. The address in the
second Dword is directly transferred to the RPSAddr
Register. The command specific part in the first Dword of
the JUMP command is like the INTERRUPT command.
If the addressed event is true the JUMP will be performed
otherwise the execution will continue at the next
command. If no event is addressed the JUMP will be
unconditional. The format of the JUMP command is shown
in Tables 28 and 29.
The OAN bit specifies if the condition in bits 25 to 0 is an
AND (OAN set to 0) or if the condition is an OR (OAN set
to 1). If the INV bit is set this command will wait for the
condition to become false.
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