參數(shù)資料
型號: 935242420112
廠商: NXP SEMICONDUCTORS
元件分類: 門電路
英文描述: LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封裝: 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14
文件頁數(shù): 19/23頁
文件大?。?/td> 163K
代理商: 935242420112
2003 Feb 24
5
Philips Semiconductors
Product specication
Hex inverter
74LVC04A
handbook, halfpage
MNA341
A
Y
Fig.5 Logic diagram (one gate).
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the absolute maximum rating system (IEC 60134); voltages are referenced to GND (ground=0V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO14 packages: above 70
°C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60
°C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
°C derate linearly with 4.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
for maximum speed performance
2.7
3.6
V
for low-voltage applications
1.2
3.6
V
VI
input voltage
0
5.5
V
VO
output voltage
0
VCC
V
Tamb
operating ambient temperature
40
+125
°C
tr,tf
input rise and fall times
VCC = 1.2 to 2.7 V
0
20
ns/V
VCC = 2.7 to 3.6 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
0.5
+6.5
V
IIK
input diode current
VI <0
50
mA
VI
input voltage
note 1
0.5
+6.5
V
IOK
output diode current
VO >VCC or VO <0
±50
mA
VO
output voltage
note 1
0.5
VCC + 0.5 V
IO
output source or sink current
VO =0toVCC
±50
mA
ICC, IGND
VCC or GND current
±100
mA
Tstg
storage temperature
65
+150
°C
Ptot
power dissipation per package
Tamb = 40 to +125 °C; note 2
500
mW
相關(guān)PDF資料
PDF描述
935242410118 LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14
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