1996 Jul 08
4
Philips Semiconductors
Preliminary specication
Digital Video Encoder (EURO-DENC)
SAA7182; SAA7183
PINNING
SYMBOL
PIN
DESCRIPTION
RESET
1
Reset input, active LOW. After reset is applied, all digital I/Os are in input mode.
The I2C-bus receiver waits for the START condition.
n.c.
2
not connected
VSSD1
3
digital ground 1
SA
4
The I2C-bus slave address select pin. LOW: slave address = 88H, HIGH = 8CH.
VDDD1
5
digital supply voltage 1
OVL2
6
3-bit overlay data input. This is the index for the internal look-up table.
OVL1
7
OVL0
8
KEY
9
Key input for OVL. When HIGH it selects OVL input.
DP0
10
Lower 4 bits of the data port. Input for multiplexed Cb, Cr data if 16 line input mode is used.
DP1
11
DP2
12
DP3
13
VDDD2
14
digital supply voltage 2
VSSD2
15
digital ground 2
DP4
16
Upper 4 bits of the data port. Input for multiplexed Cb, Cr data if 16 line input mode is used.
DP5
17
DP6
18
DP7
19
TTXRQ
20
Teletext request output, indicating when the bitstream is valid.
TTX
21
Teletext bitstream input.
VDDD3
22
digital supply voltage 3
n.c.
23
not connected
VSSD3
24
digital ground 3
MP7
25
Upper 4 bits of MPEG port. It is an input for
“CCIR 656” style multiplexed Cb, Y, Cr data, or
input for Y data only, if 16 line input mode is used.
MP6
26
MP5
27
MP4
28
VDDD4
29
digital supply voltage 4
VSSD4
30
digital ground 4
MP3
31
Lower 4 bits of MPEG port. It is an input for
“CCIR 656” style multiplexed Cb, Y, Cr data, or
input for Y data only, if 16 line input mode is used.
MP2
32
MP1
33
MP0
34
RCV1
35
Raster Control 1 for video port. This pin receives/provides a VS/FS/FSEQ signal.
RCV2
36
Raster Control 2 for video port. This pin provides an HS pulse of programmable length or
receives an HS pulse.
RTCI
37
Real Time Control Input. If the LLC clock is provided by an
SAA7111 or SAA7151B, RTCI
should be connected to the RTCO pin of the respective decoder to improve the signal quality.