參數(shù)資料
型號(hào): 935260018557
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: PLASTIC, SOT-393, QFP-64
文件頁(yè)數(shù): 71/75頁(yè)
文件大?。?/td> 479K
代理商: 935260018557
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SAA7111A
Information as of 2000-08-24
SAA7111A; Enhanced Video Input Processor (EVIP)
Description
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Applications
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PAL delay line for correcting PAL phase errors
l Real time status information output (RTCO)
l Brightness Contrast Saturation (BCS) control on-chip
l The YUV (CCIR-601) bus supports a data rate of:
– 864 f
H= 13.5 MHz for 625 line sources
– 858 f
H = 13.5 MHz for 525 line sources.
l Data output streams for 16, 12 or 8-bit width with the following formats:
– YUV 4 :1 :1 (12-bit)
– YUV 4 :2 :2 (16-bit)
– YUV 4 :2 :2 (CCIR-656) (8-bit)
– RGB (5, 6and 5) (16-bit) with dither
– RGB (8, 8and 8) (24-bit) with special application.
l Odd/even field identification by a non interlace CVBS input signal
l Fix level for RGB output format during horizontal blanking
l 720 active samples per line on the YUV bus
l One user programmable general purpose switch on an output pin
l Built-in line-21 text slicer
l A 27 MHz Vertical Blanking Interval (VBI) data bypass programmable by I
2PC-bus for INTERCAST applications
l Power-on control
l Two via I
2PC-bus switchable outputs for the digitized CVBS or Y/C input signals AD1 (7 to 0) and AD2 (7 to 0)
l Chip enable function (reset for the clock generator and power save mode up from chip version 3)
l Compatible with memory-based features (line-locked clock)
l Boundary scan test circuit complies with the ‘IEEE Std. 1149.1- 1990’ (ID-Code = 0 F111 02 B)
l I
2PC-bus controlled (full read-back ability by an external controller)
l Low power (<0.5 W), low voltage (3.3 V), small package (LQFP64)
l 5 V tolerant digital I/O ports.
l
Desktop/Notebook (PCMCIA) video
Multimedia
Applications
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