1999 Sep 27
30
Philips Semiconductors
Preliminary specication
Digital PC-camera signal processor
SAA8113HL
Table 20 Register details: address 230 ME_OB_PE_F0
Table 21 Register details: address 231 ME_OB_PO_F1
Table 22 Register details: address 232 ME_OB_PE_F1
9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); note 1 unless otherwise specied.
NAME BIT NO
FUNCTION
CCD_CATCH = 0
CCD_CATCH = 1
ME_OB_PE_F0.0 and ME_OB_PE_F0.1
ME_OB_PE_F00 and ME_OB_PE_F01
CCD0 and CCD1
ME_OB_PE_F0.2 to ME_OB_PE_F0.6
ME_OB_PE_F02 to ME_OB_PE_F06
0
ME_OB_PE_F0.7
KNOB4
NAME BIT NO
FUNCTION
CCD_CATCH = 0
CCD_CATCH = 1
ME_OB_PO_F1.0 to ME_OB_PO_F1.6
ME_OB_PO_F16 to ME_OB_PO_F10
‘undened’
ME_OB_PO_F1.7
0
NAME BIT NO
FUNCTION
CCD_CATCH = 01
CCD_CATCH = 1
ME_OB_PE_F1.0 to ME_OB_PE_F1.6
ME_OB_PE_F16 to ME_OB_PE_F10
‘undened’
ME_OB_PE_F1.7
0
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDDDn
digital supply voltages 1 and 2 for input buffer and
pre-drivers
0.5
+4.0
V
VDDAn
analog supply voltages 1, 5, 8 and 9 for output buffers
0.5
+4.0
V
VDDA2
analog supply voltage 2 for DAC output buffer
0.5
+4.0
V
VDDA3
analog supply voltage 3 for analog DAC core and band gap
0.5
+4.0
V
VDDA4
analog supply voltage 4 for audio buffer
0.5
+4.0
V
VDDA6
analog supply voltage 6 for CDAC
0.5
+4.0
V
VDDA7
analog supply voltage 7 for 38 MHz crystal oscillator
0.5
+4.0
V
DGNDn
digital grounds 1, 2, and 3 for input buffer and predrivers
0.5
+4.0
V
AGNDn
analog grounds 1, 7, 10 and 11 for output buffers
0.5
+4.0
V
AGND2
analog ground 2 for DAC output buffer
0.5
+4.0
V
AGND3
analog ground 3 for analog DAC core and band gap,
connected to substrate
0.5
+4.0
V
AGND4
analog ground 4 for analog DAC core and band gap, not
connected to substrate
0.5
+4.0
V
AGND6
analog ground 6 for audio buffer connected to substrate
0.5
+4.0
V
AGND5
analog ground 5 for audio buffer not connected to substrate
0.5
+4.0
V
AGND8
analog ground 8 for CDAC
0.5
+4.0
V
AGND9
analog ground 9 for 38 MHz crystal oscillator
0.5
+4.0
V