Philips Semiconductors - PIP - SAA7113H; 9-bit video input processor
SAA7113H; 9-bit video input
processor
Information as of 2004-02-24
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datasheet
Block diagram
General description
The 9-bit video input processor is a combination of a two-channel analog preprocessing circuit including source selection, anti-
aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard
decoder (PAL BGHI, PAL M, PAL N, combination PAL N, NTSC M, NTSC-Japan, NTSC N and SECAM), a brightness,
contrast and saturation control circuit, a multi-standard VBI data slicer and a 27 MHz VBI data bypass.
The pure 3.3 V (5 V compatible) CMOS circuit SAA7113H, analog front-end and digital video decoder, is a highly integrated
circuit for desktop video applications.
The decoder is based on the principle of line-locked clock decoding and is able to decode the colour of PAL, SECAM and
NTSC signals into CCIR-601 compatible colour component values. The SAA7113H accepts as analog inputs CVBS or S-
video (Y/C) from TV or VTR sources. The circuit is IC-bus controlled.
The integrated high performance multi-standard data slicer supports several VBI data standards:
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Teletext [WST (World Standard Teletext), CCST (Chinese teletext)] (625 lines)
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Teletext [US-WST, NABTS (North-American Broadcast Text System) and MOJI (Japanese teletext)] (525 lines)
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Closed caption [Europe, US (line 21)]
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Wide Screen Signalling (WSS)
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Video Programming Signal (VPS)
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Time codes (VITC EBU/SMPTE)
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HIGH-speed VBI data bypass for intercast application.
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