2000 Feb 08
5
Philips Semiconductors
Preliminary specication
Low-voltage low-power stereo audio ADC
UDA1360TS
Table 1
Application modes using input gain stage
Multiple format output interface
The UDA1360TS supports the following data output
formats;
I2S-bus with data word length of up to 20 bits
MSB-justified serial format with data word length of up to
20 bits.
The output format can be set by the static SFOR pin. When
SFOR is LOW, the I2S-bus is selected, when SFOR is set
HIGH the MSB-justified format is selected.
The data formats are illustrated in Fig.4. Left and right data
channel words are time multiplexed.
Decimation lter
The decimation from 128fs is performed in two stages.
The first stage realizes 3rd-order sin x/x characteristic.
This filter decreases the sample rate by 16. The second
stage (an FIR filter) consists of 3 half-band filters, each
decimating by a factor of 2.
Table 2
DC cancellation lter characteristics
Mute
On recovery from power-down, the serial data output
DATAO is held LOW until valid data is available from the
decimation filter. This time tracks with the sampling
frequency:
; where fs = 44.1 kHz.
Power-down mode
The PWON pin can control the power saving together with
the optional gain switch for 2 V (RMS) or 1 V (RMS) input.
When the PWON pin is set LOW, the ADC is set to
power-down. When PWON is set to HIGH or to half the
power supply, then either 6 dB gain or 0 dB gain in the
analog front-end is selected.
Application modes
The UDA1360TS can be set to different modes using two
3-level pins and one 2-level pin. The selection of modes is
given in Table 3.
Table 3
Mode selection summary
RESISTOR
(12 k
)
INPUT GAIN
SWITCH
MAXIMUM INPUT
VOLTAGE
Present
0 dB
2 V (RMS)
Present
6 dB
1 V (RMS)
Absent
0 dB
1 V (RMS)
Absent
6 dB
0.5 V (RMS)
ITEM
CONDITION
VALUE
(dB)
Pass-band ripple
none
Pass-band gain
0
Stop band
>0.55fs
60
Droop
at 0.00045fs
0.031
Attenuation at DC
at 0.00000036fs
>40
Dynamic range
0 to 0.45fs
>110
PIN
VSS
1
2VDD
VDD
SFOR
I2S-bus
test mode
MSB
PWON
power-down
0 dB gain
6 dB gain
FSEL
256fs
384fs
t
12288
f
s
----------------
279 ms
==