參數(shù)資料
型號: 935261615118
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO28
封裝: 7.50 MM, PLASTIC, SO-28
文件頁數(shù): 2/48頁
文件大小: 356K
代理商: 935261615118
1998 Oct 06
10
Philips Semiconductors
Preliminary specication
Universal Serial Bus (USB)
Digital-to-Analog Converter (DAC)
UDA1321
FUNCTIONAL DESCRIPTION
All bold-faced parameters given in this data sheet
such as ‘bAlternateSetting’ are part of the USB
specification as described in
“USB Device Class
Definition for Audio Devices”.
The Universal Serial Bus (USB)
Data and power are transferred via the USB by a 4-wire
cable. The signalling occurs via two wires and
point-to-point segments. The signals on each segment are
differentially driven into a cable of 90
intrinsic
impedance. The differential receiver features input
sensitivity of at least 200 mV and sufficient common mode
rejection.
The analog front-end
The analog front-end is an on-chip generic USB
transceiver. It is designed to allow voltage levels up to VDD
from standard or programmable logic to interface with the
physical layer of the USB. It is capable of receiving and
transmitting serial data at full speed (12 Mbits/s).
The USB processor
The USB processor forms the interface between the
analog front-end, the ADAC and the microcontroller.
The USB processor consists of:
The Philips Serial Interface Engine (PSIE)
The Memory Management Unit (MMU)
The Audio Sample Redistribution (ASR) module.
THE PHILIPS SERIAL INTERFACE ENGINE AND MEMORY
MANAGEMENT UNIT (PSIE AND MMU)
The PSIE and MMU translate the electrical USB signals
into bytes and signals. Depending upon the USB device
address and the USB endpoint address, the USB data is
directed to the correct endpoint buffer on the PSIE and
MMU interface. The data transfer could be of the bulk,
isochronous, control or interrupt type. The USB device
address is congured during the enumeration process.
The UDA1321 has three endpoints. These are:
Control endpoint 0
Status interrupt endpoint
Isochronous data sink endpoint.
The amount of bytes per packet on the control endpoint is
limited by the PSIE and MMU hardware to 8 bytes per
packet.
The PSIE is the digital front-end of the USB processor.This
module recovers the 12 MHz USB clock, detects the USB
sync word and handles all low-level USB protocols and
error checking.
The MMU is the digital back-end of the USB processor.
It handles the temporary data storage of all USB packets
that are received or sent over the bus. Three types of
packets are defined on the USB. These are:
Token packets
Data packets
Handshake packets.
The token packet contains information about the
destination of the data packet. The audio data is
transferred via an isochronous data sink endpoint and
consequently no handshaking mechanism is used.
The MMU also generates a 1 kHz clock that is locked to
the USB Start-Of-Frame (SOF) token.
THE AUDIO SAMPLE REDISTRIBUTION (ASR) MODULE
The ASR module reads the audio samples from the MMU
and distributes these samples equidistant over a 1 ms
frame period. The distributed audio samples are translated
by the digital I/O module to standard I2S-bus format or
Japanese digital I/O format. The ASR module generates
the bit clock and the word select signal of the digital I/O.
The digital I/O formats the received audio samples to one
of the four specied serial digital audio formats
(standard I2S-bus, 16, 18 or 20 bits LSB-justied).
The microcontroller
The microcontroller receives the control information
selected from the USB by the USB processor. It handles
the high-level USB protocols and the user interfaces.
The major task of the software process, that is mapped
upon the microcontroller, is to control the different modules
of the UDA1321 in such a way that it behaves as a USB
device. Therefore the microcontroller:
Interprets the USB requests and maps them upon the
UDA1321 application
Controls the internal operation of the UDA1321 and the
digital I/O pins
Communicates with the external world (EEPROM) using
the I2C-bus facility and the general purpose I/O pins.
相關(guān)PDF資料
PDF描述
935261616112 SPECIALTY CONSUMER CIRCUIT, PDIP32
935261617118 SERIAL INPUT LOADING, 24-BIT DAC, PDSO32
935261617112 SERIAL INPUT LOADING, 24-BIT DAC, PDSO32
935261695118 0.25 A SWITCHING REGULATOR, 50 kHz SWITCHING FREQ-MAX, PDSO8
935256880112 0.25 A SWITCHING REGULATOR, 50 kHz SWITCHING FREQ-MAX, PDIP8
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935262025112 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935262217118 制造商:NXP Semiconductors 功能描述:Real Time Clock Serial 8-Pin SO T/R
935264217557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC
935267356112 制造商:NXP Semiconductors 功能描述:IC TEA1507PN
935268081112 制造商:NXP Semiconductors 功能描述:SUB ONLY IC