參數(shù)資料
型號(hào)： 935261770518
廠商： NXP SEMICONDUCTORS
元件分類： ADC
英文描述： 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝： PLASTIC, SOT-341-1, SSOP-28
文件頁(yè)數(shù)： 12/27頁(yè)
文件大小： 218K
代理商： 935261770518
1998 Nov 03
2
Philips Semiconductors
Product specication
9-bit analog-to-digital converter
for digital video
TDA8761A
FEATURES
9-bit resolution
Sampling rate up to 40 MHz
DC sampling allowed
One clock cycle conversion only
High signal-to-noise ratio over a large analog input
frequency range (8.2 effective bits at 10 MHz full-scale
input at fclk = 30 MHz)
No missing codes guaranteed
In Range (IR) CMOS output
Levels TTL and CMOS compatible digital inputs
3 to 5 V CMOS digital outputs
Low-level AC clock input signal allowed
External reference voltage regulator
Power dissipation only 158 mW (typical)
Low analog input capacitance, no buffer amplifier
required
No sample-and-hold circuit required.
APPLICATIONS
Analog-to-digital conversion for:
Video data digitizing
Digital Video Broadcasting (DVB)
Cable TV.
GENERAL DESCRIPTION
The TDA8761A is a 9-bit Analog-to-Digital Converter
(ADC) for professional video and digital video set box
applications. It converts the analog input signal into 9-bit
binary-coded digital words at a maximum sampling rate of
40 MHz. Its linearity performance ensures the required
conversion accuracy in the event of 256-QAM
demodulator concept and for all symbol frequencies.
All digital inputs and outputs are TTL and CMOS
compatible, although a low-level sine wave clock input
signal is allowed.
QUICK REFERENCE DATA
Note
1. fi = 10 MHz and fclk = 30 MHz; fi = 8 MHz and fclk = 20 MHz.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCCA
analog supply voltage
4.75
5.0
5.25
V
VCCD
digital supply voltage
4.75
5.0
5.25
V
VCCO
output stages supply voltage
3.0
3.3
5.25
V
ICCA
analog supply current
18
24
mA
ICCD
digital supply current
13
18
mA
ICCO
output stages supply current
fclk = 30 MHz; ramp input
12mA
INL
integral non-linearity
fclk = 30 MHz; ramp input
±0.8
±1.6
LSB
AINL
AC integral non-linearity
full-scale input sine wave; note 1
±0.75 0.9
LSB
50% full-scale input sine wave; note 1
±0.5
±0.75 LSB
DNL
differential non-linearity
fclk = 30 MHz; ramp input
±0.3
±0.7
LSB
ADNL
AC differential non-linearity
full-scale input sine wave; note 1
±0.5
±0.75 LSB
50% full-scale input sine wave; note 1
±0.3
±0.5
LSB
fclk(max)
maximum clock frequency
40
MHz
Ptot
total power dissipation
158
173
mW
相關(guān)PDF資料
PDF描述
935261770112 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
935261770118 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
935261770512 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
935261790112 SPECIALTY CONSUMER CIRCUIT, PDSO28
935261790118 SPECIALTY CONSUMER CIRCUIT, PDSO28
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