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參數(shù)資料
| 型號(hào)： | 935262194112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PZIP13 |
| 封裝： | POWER, PLASTIC, SOT-141-6, DIL-BENT-SIL, 13 PIN |
| 文件頁數(shù)： | 15/18頁 |
| 文件大小： | 149K |
| 代理商： | 935262194112 |
January 1995
6
Philips Semiconductors
Preliminary specication
DC-coupled vertical deection and
East-West output circuit
TDA8350Q
CHARACTERISTICS
VP = 17.5 V; VFB = 45 V; VO(sink) = 20 V; fi = 50 Hz; II(sb) = 400 A; Tamb =25°C; measured in test circuit of Fig.3; unless
otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC supply
VP
operating supply voltage
9
25
V
VFB
yback supply voltage
Vp
50
V
note 1
60
V
IP
supply current
no signal; no load
30
55
mA
Vertical circuit
VO
output voltage swing (scan)
Idiff = 0.6 mA (p-p);
Vdiff = 1.8 V (p-p);
IO = 3 A (p-p)
19.8
V
LE
linearity error
IO = 3 A (p-p);
12%
IO = 50 mA (p-p); note 2
12%
VO
output voltage swing (yback)
VO(A) -VO(B)
Idiff = 0.3 mA;
IO = 1.5 A (M)
39
V
VDF
forward voltage of the internal
efciency diode (VO(A) -VFB)
IO = 1.5 A (M);
Idiff = 0.3 mA
1.5
V
|Ios|
output offset current
Idiff =0;
II(sb) =50to500 A
30
mA
|V
os|
offset voltage at the input of the
feedback amplier VI(fb) -VO(B)
Idiff =0;
II(sb) =50to500 A
18
mV
VosT
output offset voltage as a function
of temperature
Idiff =0;
72
V/K
VO(A)
DC output voltage
Idiff = 0; note 3
8
V
Gv
open loop voltage gain (V9-5/V1-2) notes 4 and 5
80
dB
open loop voltage gain (V9-5/V3-5;
V1-2 =0)
note 4
80
dB
VR
voltage ratio V1-2/V3-5
0
dB
fres
frequency response (
3 dB)
note 6
40
Hz
GI
current gain (IO/Idiff)
5000
GIT
current gain drift as a function of
temperature
104
/K
II(sb)
signal bias current
50
400
500
A
IFB
yback supply current
during scan
100
A
PSRR
power supply ripple rejection
note 7
80
dB
VI(DC)
DC voltage at the input
2.7
V
VI(CM)
common mode input voltage
II(sb) =0
0
1.6
V
Ibias
input bias current
II(sb) =0
0.1
0.5
A
IO(CM)
common mode output current
II(sb) = 300 A (p-p);
fi = 50 Hz; Idiff =0
0.2
mA
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