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參數(shù)資料
| 型號(hào)： | 935262194112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PZIP13 |
| 封裝： | POWER, PLASTIC, SOT-141-6, DIL-BENT-SIL, 13 PIN |
| 文件頁(yè)數(shù)： | 16/18頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | 935262194112 |
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January 1995
7
Philips Semiconductors
Preliminary specication
DC-coupled vertical deection and
East-West output circuit
TDA8350Q
Notes
1. A flyback supply voltage of
>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33
(see application circuit Fig.5).
2. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal I5 -I9 (VRM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two
succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus
part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB)
are given below;
;
3. Referenced to VP.
4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V9-5/V1-2 = voltage value across
pins 9 and 5 divided by voltage value across pins 1 and 2.
5. V3-5 AC short-circuited.
6. Frequency response V9-5/V3-5 is equal to frequency response V9-5/V1-2.
7. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz.
8. The output pin 11 requires a capacitor of minimum value 68 nF.
East-West amplier
VO(sink)
saturation voltage
IO(sink) = 500 mA;
II(corr) =0 A; note 8
2.0
2.5
V
Gv
open loop voltage gain (V11/V12)
47
dB
fres
frequency response (
3 dB)
4000
Hz
LE
linearity error
VO(sink) =3V
1%
VO(sink) = 10 V; note 2
0.5
%
Ibias
input bias current (pin 12)
2
A
VI(DC)
DC input voltage
1
V
Iset
offset voltage set current
1
mA
V13-7
maximum allowed voltage at
pin 13
0.3
V
Guard circuit
IO
output current
not active;
VO(guard) =0V
50
A
output current
active; VO(guard) = 4.5 V
1
2.5
mA
VO(guard)
output voltage
IO = 100 A
5.5
V
allowable voltage on pin 10
maximum leakage
current = 10
A
40
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LEAB
a
k
a
k1
+
()
–
a
avg
------------------------------
=
NAB
a
max
a
min
–
a
avg
------------------------------
=
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