參數(shù)資料
型號(hào)： 935262318557
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： COLOR SIGNAL ENCODER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 34/43頁
文件大?。?/td> 193K
代理商： 935262318557
1999 May 31
4
Philips Semiconductors
Product specication
Digital video encoder
SAA7126H; SAA7127H
PINNING
SYMBOL TYPE PIN
DESCRIPTION
RES
1
reserved pin; do not connect
SP
I
2
test pin; connected to digital ground for normal operation
AP
I
3
test pin; connected to digital ground for normal operation
LLC1
I
4
line-locked clock input; this is the 27 MHz master clock
VSSD1
5
digital ground 1
VDDD1
6
digital supply voltage 1
RCV1
I/O
7
raster control 1 for video port; this pin receives/provides a VS/FS/FSEQ signal
RCV2
I/O
8
raster control 2 for video port; this pin provides an HS pulse of programmable length or
receives an HS pulse
MP7
I
9
double-speed 54 MHz MPEG port; it is an input for
“CCIR 656” style multiplexed Cb-Y-Cr
data; data is sampled on the rising and falling clock edge; data sampled on the rising edge is
then sent to the encoding part of the device; data sampled on the falling edge is sent to the
RGB part of the device (or vice versa, depending on programming)
MP6
I
10
MP5
I
11
MP4
I
12
MP3
I
13
MP2
I
14
MP1
I
15
MP0
I
16
VDDD2
17
digital supply voltage 2
VSSD2
18
digital ground 2
RTCI
I
19
real-time control input (I2C-bus register SRES = 0): if the LLC1 clock is provided by an
SAA7111 or SAA7151B, RTCI should be connected to the RTCO pin of the respective
decoder to improve the signal quality. Sync reset input (I2C-bus register SRES = 1): a HIGH
impulse resets synchronization of the encoder (rst eld, rst line).
VDD(I2C)
20
sense input for I2C-bus voltage; connect to I2C-bus supply
SA
I
21
select I2C-bus address; LOW selects slave address 88H, HIGH selects slave address 8CH
VSSA1
22
analog ground 1 for RED (Cr) (C) and GREEN (Y) (VBS) outputs
RED
O
23
analog output of RED (Cr) or (C) signal
n.c.
24
not connected
VDDA1
25
analog supply voltage 1 for RED (Cr) (C) output
GREEN
O
26
analog output of GREEN (Y) or (VBS) signal
n.c.
27
not connected
VDDA2
28
analog supply voltage 2 for GREEN (Y) (VBS) output
BLUE
O
29
analog output of BLUE (Cb) or (CVBS) signal
CVBS
O
30
analog output of CVBS (CSYNC) or (VBS) signal
VDDA3
31
analog supply voltage 3 for BLUE (Cb) (CVBS) and CVBS (CSYNC) (VBS) outputs
VSSA2
32
analog ground 2 for BLUE (Cb) (CVBS) and CVBS (CSYNC) (VBS) outputs
VSSA3
33
analog ground 3 for the DAC reference ladder and the oscillator
XTAL
O
34
crystal oscillator output
XTALI
I
35
crystal oscillator input; if the oscillator is not used, this pin should be connected to ground
VDDA4
36
analog supply voltage 4 for the DAC reference ladder and the oscillator
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