參數(shù)資料
型號: 935262321518
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL ENCODER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 3/43頁
文件大小: 193K
代理商: 935262321518
1999
May
31
11
Philips
Semiconductors
Product
specication
Digital
video
encoder
SAA7126H;
SAA7127H
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Note
1. All bits labelled ‘0’ are reserved. They must be programmed with logic 0.
RTC enable, burst amplitude
62H
RTCE
BSTA6
BSTA5
BSTA4
BSTA3
BSTA2
BSTA1
BSTA0
Subcarrier 0
63H
FSC07
FSC06
FSC05
FSC04
FSC03
FSC02
FSC01
FSC00
Subcarrier 1
64H
FSC15
FSC14
FSC13
FSC12
FSC11
FSC10
FSC09
FSC08
Subcarrier 2
65H
FSC23
FSC22
FSC21
FSC20
FSC19
FSC18
FSC17
FSC16
Subcarrier 3
66H
FSC31
FSC30
FSC29
FSC28
FSC27
FSC26
FSC25
FSC24
Line 21 odd 0
67H
L21O07
L21O06
L21O05
L21O04
L21O03
L21O02
L21O01
L21O00
Line 21 odd 1
68H
L21O17
L21O16
L21O15
L21O14
L21O13
L21O12
L21O11
L21O10
Line 21 even 0
69H
L21E07
L21E06
L21E05
L21E04
L21E03
L21E02
L21E01
L21E00
Line 21 even 1
6AH
L21E17
L21E16
L21E15
L21E14
L21E13
L21E12
L21E11
L21E10
RCV port control
6BH
SRCV11
SRCV10
TRCV2
ORCV1
PRCV1
CBLF
ORCV2
PRCV2
Trigger control
6CH
HTRIG7
HTRIG6
HTRIG5
HTRIG4
HTRIG3
HTRIG2
HTRIG1
HTRIG0
Trigger control
6DH
HTRIG10
HTRIG9
HTRIG8
VTRIG4
VTRIG3
VTRIG2
VTRIG1
VTRIG0
Multi control
6EH
SBLBN
BLCKON
PHRES1
PHRES0
LDEL1
LDEL0
FLC1
FLCO
Closed caption, teletext enable
6FH
CCEN1
CCEN0
TTXEN
SCCLN4
SCCLN3
SCCLN2
SCCLN1
SCCLN0
RCV2 output start
70H
RCV2S7
RCV2S6
RCV2S5
RCV2S4
RCV2S3
RCV2S2
RCV2S1
RCV2S0
RCV2 output end
71H
RCV2E7
RCV2E6
RCV2E5
RCV2E4
RCV2E3
RCV2E2
RCV2E1
RCV2E0
MSBs RCV2 output
72H
0
RCV2E10
RCV2E9
RCV2E8
0
RCV2S10
RCV2S9
RCV2S8
TTX request H start
73H
TTXHS7
TTXHS6
TTXHS5
TTXHS4
TTXHS3
TTXHS2
TTXHS1
TTXHS0
TTX request H delay, length
74H
TTXHL3
TTXHL2
TTXHL1
TTXHL0
TTXHD3
TTXHD2
TTXHD1
TTXHD0
CSYNC advance, Vsync shift
75H
CSYNCA4 CSYNCA3 CSYNCA2 CSYNCA1 CSYNCA0
VS_S2
VS_S1
VS_S0
TTX odd request vertical start
76H
TTXOVS7
TTXOVS6
TTXOVS5
TTXOVS4
TTXOVS3
TTXOVS2
TTXOVS1
TTXOVS0
TTX odd request vertical end
77H
TTXOVE7
TTXOVE6
TTXOVE5
TTXOVE4
TTXOVE3
TTXOVE2
TTXOVE1
TTXOVE0
TTX even request vertical start
78H
TTXEVS7
TTXEVS6
TTXEVS5
TTXEVS4
TTXEVS3
TTXEVS2
TTXEVS1
TTXEVS0
TTX even request vertical end
79H
TTXEVE7
TTXEVE6
TTXEVE5
TTXEVE4
TTXEVE3
TTXEVE2
TTXEVE1
TTXEVE0
First active line
7AH
FAL7
FAL6
FAL5
FAL4
FAL3
FAL2
FAL1
FAL0
Last active line
7BH
LAL7
LAL6
LAL5
LAL4
LAL3
LAL2
LAL1
LAL0
TTX mode, MSB vertical
7CH
TTX60
LAL8
TTXO
FAL8
TTXEVE8
TTXOVE8
TTXEVS8
TTXOVS8
Null
7DH
00000000
Disable TTX line
7EH
LINE12
LINE11
LINE10
LINE9
LINE8
LINE7
LINE6
LINE5
Disable TTX line
7FH
LINE20
LINE19
LINE18
LINE17
LINE16
LINE15
LINE14
LINE13
REGISTER FUNCTION
SUB ADDR
(HEX)
DATA BYTE(1)
D7
D6
D5
D4
D3
D2
D1
D0
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