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參數(shù)資料
| 型號： | 935263206557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 71/76頁 |
| 文件大小： | 567K |
| 代理商： | 935263206557 |
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P83C557E4,
P80C557E4, P89C557E4
P83C557E4,
Information as of 2000-08-29
P83C557E4, P80C557E4, P89C557E4; Single-chip 8-bit microcontroller
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Description
The P80C557E4/P83C557E4/P89C557E4 (hereafter generically referred to as P8xC557E4) single-chip 8-bit
microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family.
The P8xC557E4 has the same instruction set as the 80C51. Three versions of the derivative exist:
l
P83C557E4 - 32 Kbytes mask programmable ROM
l
P80C557E4 - ROMless version of the P83C557E4
l
P89C557E4 - 32 Kbytes FEEPROM (Flash-EEPROM)
The P8xC557E4 contains a non-volatile 32 Kbytes mask programmable ROM (P83C557E4) or electrically erasable
FEEPROM respectively (P89C557E4), a volatile 1024 × 8 read/write data memory, five 8-bit I/O ports, one 8-bit input port,
two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and
compare latches, a 15-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width
modulated interface, two serial interfaces (UART and IC-bus), a "watchdog" timer, an on-chip oscillator and timing circuits.
For systems that require extra capability the P8xC557E4 can be expanded using standard TTL compatible memories and
logic.
In addition, the P8xC557E4 has two software selectable modes of power reduction - Idle Mode and power-down mode.
The Idle Mode freezes the CPU while allowing the RAM, timers, serial ports, and interrupt system to continue functioning.
The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be
inoperative.
The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic as well as bit-
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