參數(shù)資料
型號(hào)： 935263704557
廠商： NXP SEMICONDUCTORS
元件分類： 接收器
英文描述： AM/FM, AUDIO DEMODULATOR, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 9/71頁
文件大小： 304K
代理商： 935263704557
2000 Aug 04
17
Philips Semiconductors
Product specication
Digital TV sound demodulator/decoder
TDA9874A
7.3
Slave receiver mode
As a slave receiver, the TDA9874A provides 26 registers
for storing commands and data. Each register is accessed
via a so-called subaddress. A subaddress can be thought
of as a pointer to an internal memory location.
Detailed descriptions of the slave receiver registers are
given in Sections 7.3.2 to 7.3.21.
It is allowed to send more than one data byte per
transmission to the TDA9874A. In this event, the
subaddress is automatically incremented after each data
byte, resulting in storing the sequence of data bytes at
successive register locations, starting at SUBADDRESS.
A transmission can start at any valid subaddress. Each
byte that is properly stored, is acknowledged with
A (acknowledge).
If an attempt is made to write data to a non-existing
subaddress, the device acknowledges with A (not
acknowledge), therefore telling the I2C-bus master to abort
the transmission. There is no ‘wrap-around’ of
subaddresses.
Commands and data will be processed as soon as they
have been received completely. Functions requiring more
than one byte will thus be executed only after all bytes for
that function have been received. If the transmission is
terminated (STOP condition) before all bytes have been
received, the incomplete data for that function is ignored.
Data patterns sent to the various subaddresses are not
checked for being illegal or not at that address, except for
the level adjustment functions.
Detection of a STOP condition without a preceding
acknowledge bit is regarded as a bus error. In this case,
the last operation will not be executed.
Table 7
I2C-bus; slave address, subaddress, data format
Table 8
Explanation of Table 7
Table 9
Format for a transmission employing auto-increment of subaddresses
Note
1. n data bytes with auto-increment of subaddresses.
S
SLAVE ADDRESS
0
A
SUBADDRESS
A
DATA
A
P
BIT
FUNCTION
S
START condition
SLAVE ADDRESS
7-bit device address
0
data direction bit (write to device)
A
acknowledge
SUBADDRESS
address of register to write to
DATA
data byte to be written into register
P
STOP condition
S
SLAVE ADDRESS
0
A
SUBADDRESS
A
DATA
BYTE A(1)
DATA
A
P
7.3.1
PROGRAMMING VIA THE I2C-BUS
The TDA9874A can be programmed in the same way as
its predecessor (TDA9874H) using the
subaddresses 0 to 24 or by using ESP.
7.3.1.1
Programming via subaddresses 0 to 24
While programming the TDA9874A, by writing to
subaddresses 0 to 24, it is not allowed to access
subaddress 255. Writing data to subaddress 255 will
overwrite the data previously written to subaddresses
3 to 10. This may cause unwanted effects.
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