參數(shù)資料
型號(hào)： 935270020151
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 7/51頁(yè)
文件大?。?/td> 667K
代理商： 935270020151
Philips Semiconductors
SC16C2550
Dual UART with 16 bytes of transmit and receive FIFOs
and infrared (IrDA) encoder/decoder
Product data
Rev. 02 — 14 March 2003
15 of 47
9397 750 11204
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
data that is then made available at the user data interface D0-D7. The user optionally
compares the received data to the initial transmitted data for verifying error-free
operation of the UART TX/RX circuits.
In this mode, the receiver and transmitter interrupts are fully operational. The Modem
Control Interrupts are also operational.
Fig 6.
Internal loop-back mode diagram.
TRANSMIT
FIFO
REGISTER
TXA, TXB
RECEIVE
SHIFT
REGISTER
RECEIVE
FIFO
REGISTER
RXA, RXB
INTERCONNECT
B
US
LINES
AND
CONTR
OL
SIGNALS
SC16C2550
TRANSMIT
SHIFT
REGISTER
MODEM
CONTROL
LOGIC
CLOCK AND
BAUD RATE
GENERATOR
XTAL2
XTAL1
DATA BUS
AND
CONTROL LOGIC
D0–D7
IOR
IOW
RESET
A0–A2
CSA, CSB
REGISTER
SELECT
LOGIC
INTA, INTB
TXRDYA, TXRDYB
RXRDYA, RXRDYB
INTERRUPT
CONTROL
LOGIC
002aaa120
MCR[4] = 1
CTSA, CTSB
RTSA, RTSB
DSRA, DSRB
DTRA, DTRB
RIA, RIB
(OP1A, OP1B)
CDA, CDB
(OP2A, OP2B)
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