參數(shù)資料
型號: 935272020125
廠商: NXP SEMICONDUCTORS
元件分類: 鎖存器
英文描述: LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO5
封裝: PLASTIC, SOT-353, 5 PIN
文件頁數(shù): 12/16頁
文件大?。?/td> 69K
代理商: 935272020125
2001 Apr 04
5
Philips Semiconductors
Product specication
Single D-type ip-op; positive-edge trigger
74LVC1G79
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC is powered-down to 0 V, the output voltage can be 5.5 V in normal operation.
3. Above 55
°C the value of PD derates linearly with 2.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
1.65
5.5
V
VI
input voltage
0
5.5
V
VO
output voltage
active mode
0
VCC
V
Power-down mode; VCC = 0 V
0
5.5
V
Tamb
operating ambient temperature
40
+85
°C
tr, tf
input rise and fall times
VCC = 1.65 to 2.7 V
0
20
ns/V
VCC = 2.7 to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
0.5
+6.5
V
IIK
input diode current
VI <0
50
mA
VI
input voltage
note 1
0.5
+6.5
V
IOK
output diode current
VO >VCC or VO <0
±50
mA
VO
output voltage
active mode; notes 1 and 2
0.5
VCC + 0.5
V
Power-down mode;
notes 1 and 2
0.5
+6.5
V
IO
output source or sink current
VO =0toVCC
±50
mA
ICC, IGND
VCC or GND current
±100
mA
Tstg
storage temperature
65
+150
°C
PD
power dissipation per package
for temperature range from
40 to +85 °C; note 3
200
mW
相關(guān)PDF資料
PDF描述
935268675115 LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO5
935272029125 LVC/LCX/Z SERIES, 1-INPUT NON-INVERT GATE, PDSO5
935266681115 LVC/LCX/Z SERIES, 1-INPUT NON-INVERT GATE, PDSO5
935272239112 AVC SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO56
935272239118 AVC SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO56
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