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參數(shù)資料
| 型號(hào)： | 93716AGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 時(shí)鐘及定時(shí) |
| 英文描述： | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 6.10 MM, 0.65 MM PITCH, MO-153, LEAD FREE, TSSOP-28 |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大?。?/td> | 174K |
| 代理商： | 93716AGLFT |
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5
ICS93716
0420G—04/07/05
DC Electrical Characteristics (see note1)
TA = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDDQ, AVDD
2.3
2.5
2.7
V
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.4
VDD/2 - 0.18
V
SCLK, SDATA
-0.3
0.7
V
CLK_INT, CLK_INC, FB_INC,
FB_INT
VDD/2 + 0.18
2.1
V
SCLK, SDATA
1.7
5
V
DC input signal voltage
(note 2)
VIN
-0.3
VDD + 0.3
V
DC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.36
VDD + 0.6
V
AC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2
VDD/2 + 0.2
V
High Impedance
Output Current
IOZ
VDD=2.7V, VOUT=VDD or GND
0.1
±5
A
Operating free-air
temperature
TA
085
°C
Differential input signal
voltage (note 3)
VID
Low level input voltage
VIL
High level input voltage
VIH
Notes:
1.
Unused inputs must be held high or low to prevent them from floating.
2.
DC input signal voltage specifies the allowable DC excursion of differential input.
3.
Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VTR is the true input level and VCP is the
complementary input level.
4.
Differential cross-point voltage is expected to track variations of VDD and is the
voltage at which the differential signal crosses.
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| 93716BGLF | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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| 93716BGLFT | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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