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參數(shù)資料
| 型號： | 93716BGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 6.10 MM, 0.65 MM PITCH, LEAD FREE, MO-150, TSSOP-28 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 115K |
| 代理商： | 93716BGLF |
3
ICS93716
0420H—09/10/08
Byte 0: Output Control
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
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7
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6
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7
11
3
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5
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4
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3
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0
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Byte 1: Output Control
(1= enable, 0 = disable)
T
I
B#
N
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6
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5
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4
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3
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2
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1
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0
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R
Byte 3: Reserved
(1= enable, 0 = disable)
T
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7
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6
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5
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4
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0
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Byte 4: Reserved
(1= enable, 0 = disable)
Byte 2: Reserved
(1= enable, 0 = disable)
T
I
B#
N
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7
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6
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5
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4
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3
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Byte 5: Reserved
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
T
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B#
N
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PD
W
PN
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4
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3
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1
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11
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,
2
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2
t
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B7
2
,
6
21
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5
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1
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1
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0
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2
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4
21
4
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 93716YF-T | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 93716YGLF-T | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 93716YFLF-T | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 93716BGLFT | 93716 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 93718CFLF | 93718 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 12 INVERTED OUTPUT(S), PDSO48 |
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