參數(shù)資料
型號: 93735AFLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 93735 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝: 0.300 INCH, ROHS COMPLIANTS, MO-118, SSOP-48
文件頁數(shù): 8/9頁
文件大?。?/td> 155K
代理商: 93735AFLF
IDTTM/ICSTM Low Cost DDR Phase Lock Loop Zero Delay Buffer
ICS93735
REV F 02/11/07
ICS93735
Low Cost DDR Phase Lock Loop Zero Delay Buffer
Ordering Information
ICS93735yFLF-T
Designation for tape and reel packaging
Lead Free, RoHS Compliant (Optional)
Package Type
F=SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y F - LF T
INDEX
AREA
INDEX
AREA
12
1 2
N
D
h x 45°
E1
E
a
SEATING
PLANE
SEATING
PLANE
A1
A
e
-C-
- C -
b
.10 (.004) C
c
L
300 mil SSOP Package
MIN
MAX
MIN
MAX
A
2.41
2.80
.095
.110
A1
0.20
0.40
.008
.016
b
0.20
0.34
.008
.0135
c
0.13
0.25
.005
.010
D
E
10.03
10.68
.395
.420
E1
7.40
7.60
.291
.299
e
h
0.38
0.64
.015
.025
L
0.50
1.02
.020
.040
N
α
MIN
MAX
MIN
MAX
48
15.75
16.00
.620
.630
10-0034
Reference Doc.: JEDEC Publication 95, MO-118
VARIATIONS
SEE VARIATIONS
N
D mm.
D (inch)
SEE VARIATIONS
0.635 BASIC
0.025 BASIC
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS
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