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參數(shù)資料
| 型號： | 93AA56AP |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | EEPROM |
| 英文描述： | 2K Microwire Compatible Serial EEPROM |
| 中文描述： | 2K微絲兼容串行EEPROM |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 405K |
| 代理商： | 93AA56AP |
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
DS21794B-page 6
2003 Microchip Technology Inc.
2.4
ERASE
The
ERASE
instruction forces all data bits of the speci-
fied address to the logical ‘1’ state. CS is brought low
following the loading of the last address bit. This falling
edge of the CS pin initiates the self-timed program-
ming cycle, except on ‘93C’ devices where the rising
edge of CLK before the last address bit initiates the
write cycle.
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (T
CSL
). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
FIGURE 2-1:
ERASE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-2:
ERASE TIMING FOR 93C DEVICES
CS
CLK
DI
DO
T
CSL
CHECK STATUS
1
1
1
A
N
A
N
-1
A
N
-2
A0
T
SV
T
CZ
BUSY
READY
HIGH-Z
T
WC
HIGH-Z
CS
CLK
DI
DO
T
CSL
CHECK STATUS
1
1
1
A
N
A
N
-1
A
N
-2
A0
T
SV
T
CZ
BUSY
READY
HIGH-Z
T
WC
HIGH-Z
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PDF描述 |
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| 93AA56ASN | 2K Microwire Compatible Serial EEPROM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| 93AA56ASN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:2K Microwire Compatible Serial EEPROM |
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| 93AA56AT-E/CH | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K-16K Microwire Compatible Serial EEPROMs |
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| 93AA56ATE/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:2K Microwire Compatible Serial EEPROM |
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