- 您現(xiàn)在的位置：買賣IC網 > PDF目錄360618 > 93LC46A-SM (Microchip Technology Inc.) 1K 2.5V Microwire Serial EEPROM PDF資料下載
參數資料
| 型號： | 93LC46A-SM |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | EEPROM |
| 英文描述： | 1K 2.5V Microwire Serial EEPROM |
| 中文描述： | 一千2.5V的微型導線串行EEPROM |
| 文件頁數： | 5/12頁 |
| 文件大?。?/td> | 222K |
| 代理商： | 93LC46A-SM |
93LC46/56/66
1997 Microchip Technology Inc.
DS11168L-page 5
3.0
FUNCTIONAL DESCRIPTION
When it is connected to ground, the (x8) organization is
selected. When the ORG pin is connected to Vcc, the
(x16) organization is selected. Instructions, addresses
and write data are clocked into the DI pin on the rising
edge of the clock (CLK). The DO pin is normally held in
a HIGH-Z state, except when reading data from the
device or when checking the READY/BUSY status dur-
ing a programming operation. The READY/BUSY
status can be verified during an ERASE/WRITE opera-
tion by polling the DO pin; DO low indicates that pro-
gramming is still in progress, while DO high indicates
the device is ready. The DO will enter the HIGH-Z state
on the falling edge of the CS.
3.1
START Condition
The START bit is detected by the device if CS and DI
are both high with respect to the positive edge of CLK
for the first time.
Before a START condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
START condition), without resulting in any device oper-
ation (READ, WRITE, ERASE, EWEN, EWDS, ERAL,
and WRAL). As soon as CS is high, the device is no
longer in the standby mode.
An instruction following a START condition will only be
executed if the required amount of opcodes,
addresses, and data bits for any particular instruction is
clocked in.
After execution of an instruction (i.e., clock in or out of
the last required address or data bit) CLK and DI
become don't care bits until a new START condition is
detected.
3.2
Data In (DI) and Data Out (DO)
It is possible to connect the Data In (DI) and Data Out
(DO) pins together. However, with this configuration, if
A0 is a logic-high level, it is possible for a “bus conflict”
to occur during the “dummy zero” that precedes the
READ operation. Under such a condition the voltage
level seen at DO is undefined and will depend upon the
relative impedances of Data Out, and the signal source
driving A0. The higher the current sourcing capability of
A0, the higher the voltage at the DO pin.
3.3
Data Protection
During power-up, all programming modes of operation
are inhibited until Vcc has reached a level greater than
1.4V. During power-down, the source data protection
circuitry acts to inhibit all programming modes when
Vcc has fallen below 1.4V at nominal conditions.
The ERASE/WRITE Disable (EWDS) and ERASE/
WRITE Enable (EWEN) commands give additional pro-
tection against accidentally programming during nor-
mal operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before any ERASE or WRITE instruction can
be executed.
FIGURE 3-1:
SYNCHRONOUS DATA TIMING
CLK
STATUS VALID
V
IH
V
IL
CS
T
CSS
T
DIS
T
DIH
T
SV
T
CSH
T
CKH
T
CKL
T
PD
T
CZ
T
CZ
T
PD
V
IH
V
IL
DI
V
IH
V
IL
DO
(READ)
V
OH
V
OL
DO
(PROGRAM)
V
OH
V
OL
相關PDF資料 |
PDF描述 |
|---|---|
| 93LC46A-SN | CAP, AL ELEC, AXIAL, 1000UF, 35V |
| 93LC46A-ST | 1K 2.5V Microwire Serial EEPROM |
| 93LC46A | 1K 2.5V Microwire Serial EEPROM |
| 93LC46B | 1K 2.5V Microwire Serial EEPROM |
| 93LC46B-IP | 1K 2.5V Microwire Serial EEPROM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 93LC46A-SN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K 2.5V Microwire Serial EEPROM |
| 93LC46A-ST | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K 2.5V Microwire Serial EEPROM |
| 93LC46AT-/SM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial EEPROM |
| 93LC46AT/SN | 功能描述:電可擦除可編程只讀存儲器 128x8 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數據保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 93LC46AT-/SN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial EEPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復。