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參數(shù)資料
| 型號(hào)： | 93V857BG-025LF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 時(shí)鐘及定時(shí) |
| 英文描述： | 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-48 |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大小： | 242K |
| 代理商： | 93V857BG-025LF-T |
9
ICS93V857-XXX
Preliminary Product Preview
Ordering Information
ICS93V857yG-25T ICS93V857yG-125T ICS93V857yG-130T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
G=TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y G - PPP - T
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
INDEX
AREA
INDEX
AREA
12
1 2
N
D
E1
E
a
SEATING
PLANE
SEATING
PLANE
A1
A
A2
e
-C-
- C -
b
c
L
aaa
C
6.10 mm. Body, 0.50 mm. pitch TSSOP
(240 mil)
(0.020 mil)
MIN
MAX
MIN
MAX
A
--
1.20
--
.047
A1
0.05
0.15
.002
.006
A2
0.80
1.05
.032
.041
b
0.17
0.27
.007
.011
c
0.09
0.20
.0035
.008
D
E
E1
6.00
6.20
.236
.244
e
L
0.45
0.75
.018
.030
N
α
0°
8°
0°
8°
aaa
--
0.10
--
.004
VARIATIONS
MIN
MAX
MIN
MAX
48
12.40
12.60
.488
.496
10-0039
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
SEE VARIATIONS
8.10 BASIC
0.319 BASIC
0.50 BASIC
0.020 BASIC
SEE VARIATIONS
N
D mm.
D (inch)
Reference Doc.: JEDEC Publication 95, MO-153
Choice of static phase offset available, for easy board tuning;
-XXX = device pattern number for options listed below.
- ICS93V857-25 .......... 0ps
- ICS93V857-125 .. +125ps
- ICS93V857-130 .... +40ps
相關(guān)PDF資料 |
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| 93V857BG-025LF | 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 93V857YK-025LFT | 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40 |
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