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參數(shù)資料
| 型號(hào)： | 951901AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 133.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件頁(yè)數(shù)： | 16/21頁(yè) |
| 文件大?。?/td> | 206K |
| 代理商： | 951901AFLFT |
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4
ICS951901
0670B—07/15/04
Byte 1: CPU, Active/Inactive Register
(1= enable, 0 = disable)
Byte 2: PCI, Active/Inactive Register
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
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C
S
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7
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B-
1
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6
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B-
1
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5
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B3
11
4
K
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4
t
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B2
11
3
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I
C
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3
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2
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2
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11
1
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1
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1
0
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0
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Notes:
1. Inactive means outputs are held LOW and are disabled
from switching.
2. Latched Frequency Selects (FS#) will be inverted logic
load of the input frequency select pin conditions.
T
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B#
N
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PD
W
PN
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7
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6
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B1
21
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8
4
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3
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21
1
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2
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21
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B0
31
9
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Byte 4: SDRAM , Active/Inactive Register
(1= enable, 0 = disable)
T
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0
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11
0
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G
A
Byte 5: AGP, Active/Inactive Register
(1= enable, 0 = disable)
Byte 3: SDRAM, Active/Inactive Register
(1= enable, 0 = disable)
T
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B#
N
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 951 | WIRE TERMINAL |
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| 952001AFLFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 952080 | MODULAR TERMINAL BLOCK |
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