參數(shù)資料
型號： 951901AFLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘產(chǎn)生/分配
英文描述： 133.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝： 0.300 INCH, GREEN, MO-118, SSOP-48
文件頁數(shù)： 18/21頁
文件大?。?/td> 206K
代理商： 951901AFLFT
6
ICS951901
0670B—07/15/04
Notes:
1. PWD = Power on Default
Byte 11: VCO Frequency Control Register
Note: The decimal representation of these 7 bits (Byte 11
[6:0]) + 2 is equal to the REF divider value .
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7
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0
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6
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6
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3
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0
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Byte 12: VCO Frequency Control Register
Note: The decimal representation of these 9 bits (Byte
12 bit [7:0] & Byte 11 bit [7] ) + 8 is equal to the VCO
divider value. For example if VCO divider value of 36
is desired, user need to program 36 - 8 = 28, namely, 0,
00011100 into byte 12 bit & byte 11 bit 7.
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0
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1
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Byte 13: Spread Sectrum Control Register
Byte 14:
Spread Sectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
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6
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2
1
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8
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Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
Byte 15: Output Skew Control
Byte 16: Output Skew Control
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0
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相關PDF資料
PDF描述
951 WIRE TERMINAL
952001AF 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
952001AFLF 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
952001AFLFT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
952080 MODULAR TERMINAL BLOCK
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