參數(shù)資料
型號: 954206BFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 0.300 INCH, 0.025 INCH PITCH, M0-118N, SSOP-56
文件頁數(shù): 8/20頁
文件大?。?/td> 315K
代理商: 954206BFT
16
Integrated
Circuit
Systems, Inc.
ICS954206B
Advance Information
0940—06/23/05
I
2C Table: PEREQ# Control Register
Control
Function
Bit 7
Reserved
RW
0
Bit 6
SATACLK is controlled
RW
1
Bit 5
PCIEX3 is controlled
RW
0
Bit 4
PCIEX1 is controlled
RW
0
Bit 3
Reserved
RW
0
Bit 2
PCIEX4 is controlled
RW
1
Bit 1
PCIEX2 is controlled
RW
0
Bit 0
PCIEX0 is controlled
RW
0
I
2C Table: PLL 2 VCO Frequency Control Register
Control
Function
Bit 7
N Div8
N Divider Prog bit 8
RW
X
Bit 6
N Div9
N Divider Prog bit 9
RW
X
Bit 5
M Div5
RW
X
Bit 4
M Div4
RW
X
Bit 3
M Div3
RW
X
Bit 2
M Div2
RW
X
Bit 1
M Div1
RW
X
Bit 0
M Div0
RW
X
I
2C Table: PLL 2 VCO Frequency Control Register
Control
Function
Bit 7
N Div7
RW
X
Bit 6
N Div6
RW
X
Bit 5
N Div5
RW
X
Bit 4
N Div4
RW
X
Bit 3
N Div3
RW
X
Bit 2
N Div2
RW
X
Bit 1
N Div1
RW
X
Bit 0
N Div0
RW
X
I
2C Table: PLL 2 Spread Spectrum Control Register
Control
Function
Bit 7
SSP7
RW
X
Bit 6
SSP6
RW
X
Bit 5
SSP5
RW
X
Bit 4
SSP4
RW
X
Bit 3
SSP3
RW
X
Bit 2
SSP2
RW
X
Bit 1
SSP1
RW
X
Bit 0
SSP0
RW
X
--
1
Not Controlled
Controlled
1
The decimal representation of M and N
Divier in Byte 17 and 18 will configure the
VCO frequency. Default at power up =
Byte 0 Rom table. VCO Frequency =
14.318 x [NDiv(9:0)+8] / [MDiv(5:0)+2]
The decimal representation of M and N
Divier in Byte 17 and 18 will configure the
VCO frequency. Default at power up =
Byte 0 Rom table. VCO Frequency =
14.318 x [NDiv(9:0)+8] / [MDiv(5:0)+2]
Controlled
Not Controlled
Controlled
Not Controlled
Name
Type
M Divider Programming
bits
Type
-
Byte 19
Pin #
Spread Spectrum
Programming b(7:0)
These Spread Spectrum bits in Byte 19
and 20 will program the spread
pecentage. It is recommended to use
ICS Spread % table for spread
programming.
PWD
01
PWD
0
PWD
Name
Type
0
1
Pin #
Byte 16
-
Type
-
Pin #
Name
PEREQ2# controls selected
outputs. Outputs controlled
by this pin will be Hi-Z when
PEREQ2# is high.
PEREQ1# controls selected
outputs. Outputs controlled
by this pin will be Hi-Z when
PEREQ1# is high.
-
Byte 17
-
N Divider Programming
b(8:0)
-
Byte 18
Pin #
Name
-
Controlled
-
Not Controlled
-
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PDF描述
954206BFLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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