參數(shù)資料
型號(hào): 992215732001
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, CDIP32
封裝: CERAMIC, DIP-32
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 234K
代理商: 992215732001
2000 January
5
Philips Semiconductors
Product specification
Frame Transfer CCD Image Sensor
FT 18
Specifications
1 All voltages in relation to SFS.
2 To set the VNS voltage for optimal Vertical Anti-Blooming (VAB), it should be adjustable between minimum and maximum values.
3 Guaranteed charge reset requires the CR voltage to last at least 1.2s.
DC Conditions
1
Min.
Typical
Max.
Unit
VNS
2
VPS
SFD
SFS
VCS
OG
RD
N substrate
P substrate
Source Follower Drain
Source Follower Source
Current Source
Output Gate
Reset Drain
16
2
18
-
-2
3
12
adjusted
4
20
0
5.4
13
24
6
22
-
3
8
15
V
AC Clock Level Conditions
1
Min.
Typical
Max.
Unit
IMAGE CLOCKS:
A-clock swing
A-clock low level
Charge Reset (CR) level on A-clocks
3
Charge Pump (CP) level on A- clocks
9.5
-
10
0
-5
0
-
V
STORAGE CLOCKS (duty cycle=5/8):
B-clock swing
B-clock low level
9.5
-
10
0
-
V
OUTPUT REGISTER CLOCKS (duty cycle=1/2):
C-clock swing
C-clock low level
-
5
3
-
V
OTHER CLOCKS:
Reset Gate (RG) swing
Reset Gate (RG) low level
-
10
1
12
-
V
Absolute Maximum Ratings
Min.
Max.
Unit
GENERAL:
storage temperature
ambient temperature during operation
voltage between any two gates
DC current through any clock (absolute value)
OUT current (no short circuit protections)
-55
-40
-20
-0.2
0
+80
+60
+20
+0.2
6
°C
V
A
mA
VOLTAGES IN RELATION TO VNS:
VPS, SFS
SFD
RD
All other pins
-30
-8
-15
-32
+0.5
+8
+0.5
V
VOLTAGES IN RELATION TO VPS:
VNS
SFD, RD
SFS
All other pins
-0.5
+0
-8
-20
+30
+8
+20
V
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