參數(shù)資料
型號: 9DB1933AKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 19 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
封裝: ROHS COMPLIANT, PLASTIC, QFN-72
文件頁數(shù): 17/17頁
文件大?。?/td> 174K
代理商: 9DB1933AKLFT
IDT
Nineteen Output Differential Buffer for PCIe Gen3
9DB1933
Nineteen Output Differential Buffer for PCIe Gen3
9
1676A—07/12/10
Clock Periods Differential Outputs with Spread Spectrum Enabled
1 Clock
1us
0.1s
1us
1 Clock
Lg-
-SSC
-ppm error
0ppm
+ ppm error
+SSC
Lg+
Absolute
Period
Short-term
Average
Long-Term
Average
Period
Long-Term
Average
Short-term
Average
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Nominal
Maximum
DIF
DIF 100
9.87400
9.99900
10.00000
10.00100
10.05130
10.17630
ns
1,2,3
Clock Periods Differential Outputs with Spread Spectrum Disabled
1 Clock
1us
0.1s
1us
1 Clock
Lg-
-SSC
-ppm error
0ppm
+ ppm error
+SSC
Lg+
Absolute
Period
Short-term
Average
Long-Term
Average
Period
Long-Term
Average
Short-term
Average
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Nominal
Maximum
DIF
DIF 100
9.87400
9.99900
10.00000
10.00100
10.17630
ns
1,2,3
1Guaranteed by design and characterization, not 100% tested in production.
3 Driven by SRC output of main clock, PLL or Bypass mode
Units
Measurement
Window
Symbol
2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with
CK410B+/CK420BQ accuracy requirements. The 9DB1933 itself does not contribute to ppm error.
Notes
Definition
Measurement
Window
Units
Symbol
Definition
相關(guān)PDF資料
PDF描述
9DB202CGLF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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