參數(shù)資料
型號(hào)： 9E4101YFILFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PDSO56
封裝： 0.300 INCH, 0.250 INCH PITCH, ROHS COMPLIANT, MO-118, SSOP-56
文件頁數(shù)： 4/19頁
文件大?。?/td> 188K
代理商： 9E4101YFILFT
IDTTM
Programmable Timing Control HubTM for Intel Systems
1408A—01/25/10
ICS9E4101
Programmable Timing Control HubTM for Intel Systems
12
Absolute Max
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = -40 to 85°C; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage
VIH
3.3 V +/-5%
2
VDD + 0.3
V
Input Low Voltage
VIL
3.3 V +/-5%
VSS - 0.3
0.8
V
Input High Current
IIH
VIN = VDD
-5
5
uA
IIL1
VIN = 0 V; Inputs with no pull-
up resistors
-5
uA
IIL2
VIN = 0 V; Inputs with pull-up
resistors
-200
uA
Low Threshold Input High
Voltage
VIH_FS
3.3 V +/-5%
0.7
VDD + 0.3
V
Low Threshold Input Low
Voltage
VIL_FS
3.3 V +/-5%
VSS - 0.3
0.35
V
Operating Supply Current
IDD3.3OP
3.3 V +/-5%, Full Load
350
500
mA
all diff pairs driven
70
mA
all differential pairs tri-stated
12
mA
Input Frequency
3
Fi
VDD = 3.3 V
14.31818
MHz
3
Pin Inductance
1
Lpin
7nH
1
CIN
Logic Inputs
5
pF
1
COUT
Output pin capacitance
6
pF
1
CINX
X1 & X2 pins
5
pF
1
Clk Stabilization
1,2
TSTAB
From VDD Power-Up or de-
assertion of PD# to 1st clock
1.8
ms
1,2
Modulation Frequency
Triangular Modulation
30
33
kHz
1
Tdrive_PD#
CPU output enable after
PD# de-assertion
300
us
1
Tfall_Pd#
PD# fall time of
5
ns
1
Trise_Pd#
PD# rise time of
5
ns
2
SMBus Voltage
VDD
2.7
5.5
V
1
Low-level Output Voltage
VOLSMBUS
@ IPULLUP
0.4
V
1
Current sinking at VOL = 0.4 V
IPULLUP
4mA
1
SCLK/SDATA
Clock/Data Rise Time
TRI2C
(Max VIL - 0.15) to (Min VIH + 0.15)
1000
ns
1
SCLK/SDATA
Clock/Data Fall Time
TFI2C
(Min VIH + 0.15) to (Max VIL - 0.15)
300
ns
1
1Guaranteed by design and characterization, not 100% tested in production.
2See timing diagrams for timing requirements.
3 Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet ppm accuracy on PLL
outputs.
Input Low Current
Powerdown Current
IDD3.3PD
Input Capacitance
1
Symbol
Parameter
Min
Typ
Max
Units
VDD_A
3.3V Core Supply Voltage
VDD + 0.5V
V
VDD_In
3.3V Logic Input Supply Voltage
GND - 0.5
VDD + 0.5V
V
Ts
Storage Temperature
-65
150
°C
Tambient
Ambient Operating Temp
-40
85
°C
Tcase
Case Temperature
115
°C
ESD prot
Input ESD protection
human body model
2000
V
Θ
JA
Thermal Resistance Junction to Ambient
57.4
°C/W
Θ
JC
Thermal Resistance Junction to Case
38.8
°C/W
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