參數(shù)資料
型號(hào): 9FG107AG
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-48
文件頁(yè)數(shù): 2/16頁(yè)
文件大小: 191K
代理商: 9FG107AG
10
Integrated
Circuit
Systems, Inc.
ICS9FG107
0863C—11/22/04
I
2C Table: Frequency Select Readback Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
SEL14M_25M#
1
(FS3)
State of pin 27
R
Pin 27
Bit 6
FS2
1
State of pin 6
R
Pin 5
Bit 5
FS1
1
State of pin 44
R
Pin 44
Bit 4
FS0
1
State of pin 7
R
Pin 7
Bit 3
SPREAD
1
State of pin 26
R
Off
On
Pin 26
Bit 2
RX
Bit 1
RX
Bit 0
DWNSPRD
1
State of pin 45
R
Down
Center
Pin 45
Notes:
1. These read-only bits always reflect the latched state of the corresponding pins at power up.
I
2C Table: Vendor & Revision ID Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
RID3
R
-
0
Bit 6
RID2
R
-
0
Bit 5
RID1
R
-
0
Bit 4
RID0
R
-
0
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
I
2C Table: DEVICE ID
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
R0
Bit 6
R0
Bit 5
R0
Bit 4
R0
Bit 3
R0
Bit 2
R1
Bit 1
R1
Bit 0
R1
RESERVED
Device ID = 07 Hex
Bit 7 is MSB
RESERVED
5
27
7
44
Byte 3
26
RESERVED
45
Byte 4
-
REVISION ID
-
VENDOR ID
-
Byte 5
-
See Frequency
Selection Table, Page 1
-
相關(guān)PDF資料
PDF描述
9FG108CFLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
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