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參數(shù)資料
| 型號： | 9FG107AGLN |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 191K |
| 代理商： | 9FG107AGLN |
2
Integrated
Circuit
Systems, Inc.
ICS9FG107
0863C—11/22/04
Pin Description
PIN
#
PIN NAME
PIN TYPE
DESCRIPTION
1
XIN/CLKIN
IN
Crystal input or Reference Clock input
2
X2
OUT
Crystal output, Nominally 14.318MHz
3
VDD
PWR
Power supply, nominal 3.3V
4
GND
PWR
Ground pin.
5
*FS2/REFOUT
I/O
Frequency select latch input pin / Reference clock output
6
GND
PWR
Ground pin.
7
*FS0/PCICLK_F
I/O
Frequency select latch input pin / 3.3V PCI free running clock output.
8
PCICLK0
OUT
PCI clock output.
9
PCICLK1
OUT
PCI clock output.
10
VDD
PWR
Power supply, nominal 3.3V
11
**OE_6
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
12
DIF_6
OUT
0.7V differential true clock outputs
13
DIF_6#
OUT
0.7V differential complement clock outputs
14
VDD
PWR
Power supply, nominal 3.3V
15
GND
PWR
Ground pin.
16
**OE_5
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
17
DIF_5
OUT
0.7V differential true clock outputs
18
DIF_5#
OUT
0.7V differential complement clock outputs
19
VDD
PWR
Power supply, nominal 3.3V
20
DIF_4
OUT
0.7V differential true clock outputs
21
DIF_4#
OUT
0.7V differential complement clock outputs
22
*OE_4
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
23
SDATA
I/O
Data pin for SMBus circuitry, 5V tolerant.
24
SCLK
IN
Clock pin of SMBus circuitry, 5V tolerant.
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PDF描述 |
|---|---|
| 9FG107AG | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG108CFLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG108CFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG108CGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9FG108DFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9FG107AGLNT | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG108CFLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG108CFLF PHASED LOCKED LOOP (PLL) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG108CFLF Phased Locked Loop (PLL) |
| 9FG108DFILF | 功能描述:時鐘合成器/抖動清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG108DFILFT | 功能描述:時鐘合成器/抖動清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9FG108DFLF | 功能描述:時鐘合成器/抖動清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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