參數(shù)資料
型號: 9FG1200DF-1LF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 400 MHz, OTHER CLOCK GENERATOR, PDSO56
封裝: 0.300 INCH, 0.025 INCH PITCH, ROHS COMPLIANT, MO-118, SSOP-56
文件頁數(shù): 11/23頁
文件大?。?/td> 188K
代理商: 9FG1200DF-1LF
IDT
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
1138C
02/08/10
ICS9FG1200D-1
19
Common Recommendations for Differential Routing
Dimension or Value
Unit
Figure
L1 length, route as non-coupled 50ohm trace
0.5 max
inch
1
L2 length, route as non-coupled 50ohm trace
0.2 max
inch
1
L3 length, route as non-coupled 50ohm trace
0.2 max
inch
1
Rs
33
ohm
1
Rt
49.9
ohm
1
Down Device Differential Routing
L4 length, route as coupled microstrip 100ohm differential trace
2 min to 16 max
inch
1
L4 length, route as coupled stripline 100ohm differential trace
1.8 min to 14.4 max
inch
1
Differential Routing to PCI Express Connector
L4 length, route as coupled microstrip 100ohm differential trace
0.25 to 14 max
inch
2
L4 length, route as coupled stripline 100ohm differential trace
0.225 min to 12.6 max
inch
2
SRC Reference Clock
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3
L3'
Rt
PCI Express
Down Device
REF_CLK Input
Figure 1: Down Device Routing
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3
L3'
Rt
PCI Express
Add-in Board
REF_CLK Input
Figure 2: PCI Express Connector Routing
相關PDF資料
PDF描述
9FG1200YG-1LF-T 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
9FG1200YF-1LF-T 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
9FG1201HGLF-T 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
9FG1201HGLF 400 MHz, OTHER CLOCK GENERATOR, PDSO56
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