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| 型號(hào)： | 9S12XDP512DGV1 |
| 英文描述： | Device User Guide for Mask Set 0L40V ( First Silicon) |
| 中文描述： | 設(shè)備用戶指南掩模組0L40V（第一硅） |
| 文件頁(yè)數(shù)： | 81/152頁(yè) |
| 文件大?。?/td> | 1231K |
| 代理商： | 9S12XDP512DGV1 |
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2.3.49 PP7 / KWP7 / PWM7 / SCK2 — Port P I/O Pin 7
PP7isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 7 output. It
can be configured as serial clock pin SCK of the Serial Peripheral Interface 2 (SPI2).
2.3.50 PP6 / KWP6 / PWM6 / SS2 — Port P I/O Pin 6
PP6isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 6 output. It
can be configured as slave select pin SS of the Serial Peripheral Interface 2 (SPI2).
2.3.51 PP5 / KWP5 / PWM5 / MOSI2 — Port P I/O Pin 5
PP5isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 5 output. It
can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of
the Serial Peripheral Interface 2 (SPI2).
2.3.52 PP4 / KWP4 / PWM4 / MISO2 — Port P I/O Pin 4
PP4isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 4 output. It
can be configured as master input (during master mode) or slave output (during slave mode) pin MISO of
the Serial Peripheral Interface 2 (SPI2).
2.3.53 PP3 / KWP3 / PWM3 / SS1 — Port P I/O Pin 3
PP3isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 3 output. It
can be configured as slave select pin SS of the Serial Peripheral Interface 1 (SPI1).
2.3.54 PP2 / KWP2 / PWM2 / SCK1 — Port P I/O Pin 2
PP2isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 2 output. It
can be configured as serial clock pin SCK of the Serial Peripheral Interface 1 (SPI1).
2.3.55 PP1 / KWP1 / PWM1 / MOSI1 — Port P I/O Pin 1
PP1isageneralpurposeinputoroutputpin.ItcanbeconfiguredtogenerateaninterruptcausingtheMCU
to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 1 output. It
can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of
the Serial Peripheral Interface 1 (SPI1).
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
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| 9S12XDP512DGV2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set) |
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