參數(shù)資料
型號： A3P1000-1FG144I
元件分類： FPGA
英文描述： FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA144
封裝： 13X 13 MM, 1.45 MM HEIGHT, 1 MM PITCH, FBGA-144
文件頁數(shù)： 1/144頁
文件大?。?/td> 4877K
代理商： A3P1000-1FG144I
December 2009
I
2010 Actel Corporation
Automotive ProASIC3 Flash Family FPGAs
Features and Benefits
High-Temperature AEC-Q100–Qualified Devices
Grade 2 105°C TA (115°C TJ)
Grade 1 125°C TA (135°C TJ)
PPAP Documentation
Firm-Error Immune
Only Automotive FPGAs to Offer Firm-Error Immunity
Can Be Used without Configuration Upset Risk
High Capacity
60 k to 1 M System Gates
Up to 144 kbits of SRAM
Up to 300 User I/Os
Reprogrammable Flash Technology
130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS
Automotive Process
Live-at-Power-Up (LAPU) Level 0 Support
Single-Chip Solution
Retains Programmed Design when Powered Off
On-Chip User Nonvolatile Memory
1 kbit of FlashROM with Synchronous Interface
High Performance
350 MHz System Performance
3.3 V, 66 MHz 64-Bit PCI
In-System Programming (ISP) and Security
Secure ISP Using On-Chip 128-Bit Advanced Encryption
Standard (AES) Decryption via JTAG (IEEE 1532–compliant)
FlashLock to Secure FPGA Contents (anti-tampering)
Low Power
1.5 V Core Voltage
Support for 1.5-V-Only Systems
Low-Impedance Flash Switches
High-Performance Routing Hierarchy
Segmented, Hierarchical Routing and Clock Structure
High-Performance, Low-Skew Global Network
Architecture Supports Ultra-High Utilization
Advanced I/O
700 Mbps DDR, LVDS-Capable I/Os
1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
Bank-Selectable I/O Voltages—up to 4 Banks per Chip
Single-Ended
I/O
Standards:
LVTTL,
LVCMOS
3.3 V /
2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X, and LVCMOS
2.5 V / 5.0 V Input
Differential I/O Standards: LVPECL, LVDS, B-LVDS, and
M-LVDS (A3P250 and A3P1000)
I/O Registers on Input, Output, and Enable Paths
Hot-Swappable and Cold-Sparing I/Os
Programmable Output Slew Rate and Drive Strength
Weak Pull-Up/-Down
IEEE 1149.1 (JTAG) Boundary Scan Test
Pin-Compatible Packages across the Automotive ProASIC3
Family
Clock Conditioning Circuit (CCC) and PLL
Six CCC Blocks, One with an Integrated PLL
Configurable Phase Shift, Multiply/Divide, Delay Capabilities,
and External Feedback
Wide Input Frequency Range (1.5 MHz up to 350 MHz)
SRAMs
Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4, ×9,
and ×18 organizations available)
Table 1 Automotive ProASIC3 Product Family
ProASIC3 Devices
A3P060
A3P125
A3P250
A3P1000
System Gates
60 k
125 k
250 k
1 M
VersaTiles (D-flip-flops)
1,536
3,072
6,144
24,576
RAM kbits (1,024 bits)
18
36
144
4,608-Bit Blocks
4
8
32
FlashROM Bits
1 k
Secure (AES) ISP
Yes
Integrated PLL in CCCs
1111
VersaNet Globals1
18
I/O Banks
2244
Maximum User I/Os
96
133
157
300
Package Pins
VQFP
FBGA
QFN2
VQ100
FG144
VQ100
FG144
QNG132
VQ100
FG144, FG256
QNG132
FG144, FG256, FG484
Notes:
1. Six chip-wide (main) globals and three additional global networks in each quadrant are available.
2. QFN packages are available as RoHS compliant only.
Revision 1
相關(guān)PDF資料
PDF描述
A3P1000-1FG256I FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA256
A3P1000-1FG484I FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA484
A3P1000-FG144I FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA144
A3P1000-FG256I FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA256
A3P1000-FG484I FPGA, 24576 CLBS, 1000000 GATES, 350 MHz, PBGA484
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A3P1000-1FG144M 制造商:Microsemi Corporation 功能描述:FPGA ProASIC?3 Family 1M Gates 130nm Technology 1.5V 144-Pin FBGA 制造商:Microsemi Corporation 功能描述:FPGA PROASIC?3 FAMILY 1M GATES 130NM (CMOS) TECHNOLOGY 1.5V - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA PROASIC?3 FAMILY 1M GATES 130NM (CMOS) TECHNOLOGY 1.5V - Trays
A3P1000-1FG144PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3 Flash Family FPGAs
A3P1000-1FG144T 功能描述:IC FPGA 1KB FLASH 1M 144-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23）
A3P1000-1FG256 功能描述:IC FPGA 1KB FLASH 1M 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設備封裝:256-FPBGA（17x17）
A3P1000-1FG256I 功能描述:IC FPGA 1KB FLASH 1M 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA（27X27）
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