CEQ Values for Microsemi MX FPGAs
參數(shù)資料
型號: A40MX04-2PLG84I
廠商: Microsemi SoC
文件頁數(shù): 50/142頁
文件大小: 0K
描述: IC FPGA MX SGL CHIP 6K 84-PLCC
標(biāo)準(zhǔn)包裝: 16
系列: MX
輸入/輸出數(shù): 69
門數(shù): 6000
電源電壓: 3 V ~ 3.6 V,4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 84-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 84-PLCC(29.31x29.31)
40MX and 42MX FPGA Families
Re vi s i on 11
1 - 11
CEQ Values for Microsemi MX FPGAs
Modules (CEQM)3.5
Input Buffers (CEQI)6.9
Output Buffers (CEQO)18.2
Routed Array Clock Buffer Loads (CEQCR)1.4
To calculate the active power dissipated from the complete design, the switching frequency of each part
of the logic must be known. The equation below shows a piece-wise linear summation over all
components.
Power = VCCA2 * [(m x
CEQM * fm)Modules +
(n *
CEQI * fn)Inputs + (p * (CEQO + CL) * fp)outputs +
0.5 * (q1 * CEQCR * fq1)routed_Clk1 + (r1 * fq1)routed_Clk1 +
0.5 * (q2 * CEQCR * fq2)routed_Clk2 + (r2 * fq2)routed_Clk2 (2)
where:
Fixed Capacitance Values for MX FPGAs (pF)
m
=
Number of logic modules switching at frequency fm
n
=
Number of input buffers switching at frequency fn
p
=
Number of output buffers switching at frequency fp
q1
=
Number of clock loads on the first routed array clock
q2
=
Number of clock loads on the second routed array clock
r1
=
Fixed capacitance due to first routed array clock
r2
=
Fixed capacitance due to second routed array clock
CEQM = Equivalent capacitance of logic modules in pF
CEQI = Equivalent capacitance of input buffers in pF
CEQO = Equivalent capacitance of output buffers in pF
CEQC
R
=
Equivalent capacitance of routed array clock in pF
CL
=
Output load capacitance in pF
fm
=
Average logic module switching rate in MHz
fn
=
Average input buffer switching rate in MHz
fp
=
Average output buffer switching rate in MHz
fq1
=
Average first routed array clock rate in MHz
fq2
=
Average second routed array clock rate in MHz
Device Type
r1
routed_Clk1
r2
routed_Clk2
A40MX02
41.4
N/A
A40MX04
68.6
N/A
A42MX09
118
A42MX16
165
A42MX24
185
A42MX36
220
相關(guān)PDF資料
PDF描述
GSC60DRAH CONN EDGECARD 120PS R/A .100 SLD
A40MX04-2PL84I IC FPGA MX SGL CHIP 6K 84-PLCC
GMC60DRAH CONN EDGECARD 120PS R/A .100 SLD
EP4CE15F23I8L IC CYCLONE IV FPGA 15K 484FBGA
HSC49DREF-S734 CONN EDGECARD 98POS .100 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A40MX04-2PQ100 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)
A40MX04-2PQ100I 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)
A40MX04-2PQ100M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
A40MX04-2PQG100 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)
A40MX04-2PQG100I 功能描述:IC FPGA MX SGL CHIP 6K 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)