參數(shù)資料
型號： A42MX24-3PQ100B
廠商： Electronic Theatre Controls, Inc.
英文描述： 40MX and 42MX FPGA Families
中文描述： 40MX和42MX FPGA系列
文件頁數(shù)： 53/93頁
文件大小： 854K
代理商： A42MX24-3PQ100B
57
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
BALL GRID ARRAY PACKAGE - SIGNAL DESCRIPTIONS BY FUNCTIONAL GROUPS
+ 3.3V_Xcvr
-
+ 3.3V_Logic
-
Gnd_Logic
E12, E13, E14,
F12, F13, F14,
G12, G13, G14,
H12, H13, H14,
VDD_Low (I)
A13
TABLE 57. POWER AND GROUND
SIGNAL NAME
BU-64840B3
BU-64860B3
BALL
BU-64743B8
BU-64843B8
BU-64863B8
BALL
+ 3.3 Volt Transceiver Power
+ 5.0V_Xcvr
F1, F2, U13,V13
A4, A5, B4, B5, J1,
J2, J3, J4, J5, K1,
K2, K3, K4, K5, U4,
U5, V4, V5
A8, A9, B8, B9,
L16, L17, M16,
M17, N12, N13,
P12, P13, R6, R7,
T6, T7, U6, U7, V6,
V7
E10, E11, E12,
F10, F11, F12,
G10, G11, G12,
H10, H11, H12,
R11, R12, R13,
T11, T12, T13, U11,
U12, U13
-
+ 5.0 Volt Transceiver Power
+3.3 V Logic Power
+ 5.0V/
+ 3.3V_Logic
A7, L1, L2, L15,
L16, M3, P7, P9,
R9, V8
-
+5.0V/+3.3V Logic Power. These balls may connect to either +5.0V or +3.3V. Refer to
input signal VDD_Low (ball A13) to determine voltage selection options.
+ 5.0V_RAM
P4, R4, (BU-
64860B3 only)
-
For BU-64860B3 this ball must be connected to +5.0V
Gnd_Xcvr/
Thermal
D3, D4, D5, E2, E3,
E4, E5, F3, F4, F5,
G2, G3, G4, G5,
H3, H4, H5, P11,
P12, P13, P14,
P15, R11, R12,
R13, R14, R15,
T11, T12, T13, T14,
T15, U12, U14
D3, D4, D5, E3, E4,
E5, F1, F2, F3, F4,
F5, G3, G4, G5, L3,
L4, L5, M3, M4, M5,
N1, N2, N3, N4, N5,
P3, P4, P5
Transceiver Ground/Thermal connections. See Thermal Management Section for
important user information.
Logic Ground.
Input that selects logic threshold voltage. Set to logic "0" for 3.3V threshold and to
+5V(logic "1") for 5V threshold. Must match "+5.0V/+3V Logic" input voltage.
DESCRIPTION
NOTE: Logic ground and transceiver ground are not tied together inside the package.
相關(guān)PDF資料
PDF描述
A42MX24-3BG100 40MX and 42MX FPGA Families
A42MX24-3PL100 40MX and 42MX FPGA Families
A42MX24-3PL100A 40MX and 42MX FPGA Families
A42MX24-3PQ100A 40MX and 42MX FPGA Families
A42MX24-3VQ100 40MX and 42MX FPGA Families
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A42MX24-3PQ160 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-3PQ160I 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-3PQ208 功能描述:IC FPGA MX SGL CHIP 36K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-3PQ208I 功能描述:IC FPGA MX SGL CHIP 36K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-3PQ208IPM79 制造商:Microsemi Corporation 功能描述:FPGA 36K GATES 912 CELLS 0.45UM 3.3V/5V 208PQFP - Trays
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