參數(shù)資料
型號(hào): A54SX16-CQ208B
廠商: Microsemi SoC
文件頁(yè)數(shù): 1/64頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SX 24K GATES 208-CQFP
標(biāo)準(zhǔn)包裝: 1
系列: SX
LAB/CLB數(shù): 1452
輸入/輸出數(shù): 175
門數(shù): 24000
電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 208-BFCQFP,帶拉桿
供應(yīng)商設(shè)備封裝: 208-CQFP(75x75)
June 2006
i
2006 Actel Corporation
See the Actel website for the latest version of the datasheet.
SX Family FPGAs
Leading Edge Performance
320 MHz Internal Performance
3.7 ns Clock-to-Out (Pin-to-Pin)
0.1 ns Input Setup
0.25 ns Clock Skew
Specifications
12,000 to 48,000 System Gates
Up to 249 User-Programmable I/O Pins
Up to 1,080 Flip-Flops
0.35 CMOS
Features
66 MHz PCI
CPLD and FPGA Integration
Single-Chip Solution
100% Resource Utilization with 100% Pin Locking
3.3 V and 5.0 V Operation with 5.0 V Input Tolerance
Very Low Power Consumption
Deterministic, User-Controllable Timing
Unique In-System Diagnostic and Debug Capability
with Silicon Explorer II
Boundary Scan Testing in Compliance with IEEE
Standard 1149.1 (JTAG)
Secure Programming Technology Prevents Reverse
Engineering and Design Theft
e
u
SX Product Profile
Device
A54SX08
A54SX16
A54SX16P
A54SX32
Capacity
Typical Gates
System Gates
8,000
12,000
16,000
24,000
16,000
24,000
32,000
48,000
Logic Modules
Combinatorial Cells
768
512
1,452
924
1,452
924
2,880
1,800
Register Cells (Dedicated Flip-Flops)
256
528
1,080
Maximum User I/Os
130
175
249
Clocks
333
3
JTAG
Yes
PCI
––
Yes
Clock-to-Out
3.7 ns
3.9 ns
4.4 ns
4.6 ns
Input Setup (external)
0.8 ns
0.5 ns
0.1 ns
Speed Grades
Std, –1, –2, –3
Temperature Grades
C, I, M
Packages (by pin count)
PLCC
PQFP
VQFP
TQFP
PBGA
FBGA
84
208
100
144, 176
144
208
100
176
208
100
144, 176
208
144, 176
313, 329
v3.2
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