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參數(shù)資料
| 型號(hào)： | A54SX32A-CQ208C |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 2880 CLBS, 32000 GATES, 206 MHz, CQFP208 |
| 封裝： | CERAMIC, QFP-208 |
| 文件頁數(shù)： | 36/40頁 |
| 文件大?。?/td> | 738K |
| 代理商： | A54SX32A-CQ208C |
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Hi R e l S X -A F a m i l y F P G A s
S X -A F a m ily A r c h ite c t u r e
The SX-A family architecture was designed to satisfy
next-generation performance and integration requirements
for production-volume designs in a broad range of
applications.
P rog ra m ma b l e Int e r con nect E l em ent
The SX-A family provides efficient use of silicon by locating
the routing interconnect resources between the Metal 2
(M2) and Metal 3 (M3) layers (Figure 1). This completely
eliminates the channels of routing and interconnect
resources between logic modules (as implemented on
SRAM FPGAs and previous generations of antifuse FPGAs),
and enables the entire floor of the device to be spanned
with an uninterrupted grid of logic modules.
Interconnection between these logic modules is achieved
using
Actel’s
patented
metal-to-metal
programmable
antifuse interconnect elements, which are embedded
between the M2 and M3 layers. The antifuses are normally
open circuit and, when programmed, form a permanent
low-impedance connection.
The extremely small size of these interconnect elements
gives the SX-A family abundant routing resources and
provides excellent protection against design pirating.
Reverse engineering is virtually impossible because it is
extremely difficult to distinguish between programmed and
unprogrammed antifuses, and there is no configuration
bitstream to intercept.
Additionally, the interconnect (i.e., the antifuses and metal
tracks) have lower capacitance and lower resistance than
any other device of similar capacity, leading to the fastest
signal propagation in the industry.
Note:
A54SX72A has 4 layers of metal with the antifuse between Metal 3 and Metal 4.
Figure 1 SX-A Family Interconnect Elements
Silicon Substrate
Tungsten Plug
Contact
Metal 1
Metal 2
Metal 3
Routing Tracks
Amorphous Silicon/
Dielectric Antifuse
Tungsten Plug Via
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PDF描述 |
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| A54SX32A-CQ256C | FPGA, 2880 CLBS, 32000 GATES, 206 MHz, CQFP256 |
| A54SX32A-CQG208C | FPGA, 2880 CLBS, 32000 GATES, 206 MHz, CQFP208 |
| A54SX32A-CQG256C | FPGA, 2880 CLBS, 32000 GATES, 206 MHz, CQFP256 |
| A54SX72A-FG256AX79 | FPGA, 4024 CLBS, 72000 GATES, PBGA256 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX32A-CQ208M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A Family 32K Gates 1800 Cells 238MHz 0.25um/0.22um (CMOS) Technology 2.5V 208-Pin CQFP 制造商:Microsemi Corporation 功能描述:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 208 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 48K GATES 208CQFP 制造商:Microsemi Corporation 功能描述:IC FPGA 174 I/O 208CQFP |
| A54SX32A-CQ256 | 功能描述:IC FPGA SX 48K GATES 256-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A54SX32A-CQ256B | 功能描述:IC FPGA SX 48K GATES 256-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A54SX32A-CQ256M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 256 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 48K GATES 256CQFP 制造商:Microsemi Corporation 功能描述:IC FPGA 228 I/O 256CQFP |
| A54SX32A-CQ84 | 功能描述:IC FPGA SX 48K GATES 84-CQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
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