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參數資料
| 型號： | A54SX32AFG256 |
| 英文描述： | Logic IC |
| 中文描述： | 邏輯IC |
| 文件頁數： | 14/36頁 |
| 文件大?。?/td> | 833K |
| 代理商： | A54SX32AFG256 |
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54SX Family FPGAs RadTolerant and HiRel
14
v2.0
where:
m
n
p
q
1
Determining Average Switching Frequency
To determine the switching frequency for a design, you must
have a detailed understanding of the data input values to
the circuit. The following guidelines are meant to represent
worst-case scenarios so that they can be generally used to
predict the upper limits of power dissipation. These
guidelines are as follows:
Logic Modules (m)
Inputs Switching (n)
Outputs Switching (p)
First Routed Array Clock Loads (q
1
) =
= Number of logic modules switching at f
m
= Number of input buffers switching at f
n
= Number of output buffers switching at f
p
= Number of clock loads on the first routed array
clock
= Number of clock loads on the second routed
array clock
= Fixed capacitance due to first routed array
clock
= Fixed capacitance due to second routed array
clock
= Fixed number of clock loads on the dedicated
array clock = (528 for A54SX16)
= Equivalent capacitance of logic modules in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of routed array clock in
pF
= Equivalent capacitance of dedicated array
clock in pF
= Output lead capacitance in pF
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
= Average output buffer switching rate in MHz
= Average first routed array clock rate in MHz
= Average second routed array clock rate in MHz
q
2
r
1
r
2
s
1
C
EQM
C
EQI
C
EQO
C
EQCR
C
EQCD
C
L
f
m
f
n
f
p
f
q1
f
q2
=
=
=
80% of modules
# inputs/4
# output/4
40% of
sequential
modules
40% of
sequential
modules
35 pF
F/10
Second Routed Array Clock Loads
(q
2
)
=
Load Capacitance (C
L
)
Average Logic Module Switching
Rate (f
m
)
Average Input Switching Rate (f
n
)
Average Output Switching Rate (f
p
) =
Average First Routed Array Clock
Rate (f
q1
)
Average Second Routed Array Clock
Rate (f
q2
)
Average Dedicated Array Clock Rate
(f
s1
)
=
=
=
F/5
F/10
F/2
=
=
F/2
=
F
相關PDF資料 |
PDF描述 |
|---|---|
| A54SX32AFG256I | Logic IC |
| A54SX32AFG256M | Logic IC |
| A54SX32-BG313 | Field Programmable Gate Array (FPGA) |
| A54SX32-BG313I | Field Programmable Gate Array (FPGA) |
| A54SX32-BG313M | Field Programmable Gate Array (FPGA) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| A54SX32A-FG256 | 功能描述:IC FPGA SX 48K GATES 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:SX-A 標準包裝:40 系列:SX-A LAB/CLB數:6036 邏輯元件/單元數:- RAM 位總計:- 輸入/輸出數:360 門數:108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA（27X27） |
| A54SX32A-FG256A | 功能描述:IC FPGA SX 48K GATES 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:SX-A 標準包裝:40 系列:SX-A LAB/CLB數:6036 邏輯元件/單元數:- RAM 位總計:- 輸入/輸出數:360 門數:108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA（27X27） |
| A54SX32A-FG256I | 功能描述:IC FPGA SX 48K GATES 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:SX-A 標準包裝:40 系列:SX-A LAB/CLB數:6036 邏輯元件/單元數:- RAM 位總計:- 輸入/輸出數:360 門數:108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA（27X27） |
| A54SX32A-FG256M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 256 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 48K GATES 256FBGA 制造商:Microsemi Corporation 功能描述:IC FPGA 203 I/O 256FBGA |
| A54SX32A-FG484 | 功能描述:IC FPGA SX 48K GATES 484-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:SX-A 標準包裝:40 系列:SX-A LAB/CLB數:6036 邏輯元件/單元數:- RAM 位總計:- 輸入/輸出數:360 門數:108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設備封裝:484-FPBGA（27X27） |
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