Figure 2-4 Output Buffer Delays To AC Test Loads (shown below) PAD D E TRIBUFF " />
參數(shù)資料
型號(hào): A54SX72A-PQG208I
廠商: Microsemi SoC
文件頁(yè)數(shù): 38/108頁(yè)
文件大小: 0K
描述: IC FPGA SX-A 108K 208-PQFP
標(biāo)準(zhǔn)包裝: 24
系列: SX-A
LAB/CLB數(shù): 6036
輸入/輸出數(shù): 171
門數(shù): 108000
電源電壓: 2.25 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
SX-A Family FPGAs
v5.3
2-15
Output Buffer Delays
AC Test Loads
Figure 2-4 Output Buffer Delays
To AC Test Loads (shown below)
PAD
D
E
TRIBUFF
In
GND
50%
Out
1.5 V
50%
1.5 V
En
GND
50%
Out
1.5 V
50%
10%
En
GND
50%
Out
GND
1.5 V
50%
90%
VOL
VOL
V
CC
V
CC
V
CC
V
CC
V
OH
t
ENZH
t
ENHZ
t
ENZL
t
ENLZ
t
DLH
Figure 2-5 AC Test Loads
35 pF
VCC
GND
35 pF
VCC
GND
5 pF
R to VCC for
t
PZL
R to GND for tPZH
R = 1 k
Ω
R to VCC for
tPZL
R to GND for tPZH
R = 1 k
Ω
To the Output
Under Test
To the Output
Under Test
To the Output
Under Test
Load 1
(Used to measure
propagation delay)
Load 2
(Used to measure enable delays)
Load 3
(Used to measure disable delays)
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