參數(shù)資料
型號(hào)： A80960JD-33
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： EMBEDDED 32-BIT MICROPROCESSOR
中文描述： 32-BIT, 33 MHz, RISC PROCESSOR, CPGA132
封裝： PGA-132
文件頁(yè)數(shù)： 16/78頁(yè)
文件大?。?/td> 835K
代理商： A80960JD-33
80960JA/JF/JD/JT 3.3 V Microprocessor
16
Advance Information Datasheet
3.1
Pin Descriptions
This section describes the pins for the 80960Jx in the 132-pin ceramic Pin Grid Array (PGA)
package, 132-lead Plastic Quad Flatpack Package (PQFP) and 196-ball Mini Plastic Ball Grid
Array (MPBGA).
Section 3.1.1, “Functional Pin Definitions”, describes pin function; Section 3.1.2, “80960Jx
132-Lead PGA Pinout”, Section 3.1.3, “80960Jx 132-Lead PQFP Pinout” and Section 3.1.4,
“80960Jx 196-Ball MPBGA Pinout”, define the signal and pin locations for the supported package
types.
3.1.1
Functional Pin Definitions
Table 2 presents the legend for interpreting the pin descriptions which follow. Pins associated with
the bus interface are described in Table 3. Pins associated with basic control and test functions are
described in Table 4. Pins associated with the Interrupt Unit are described in Table 5.
Table 2.
Pin Description Nomenclature
Symbol
Description
I
Input pin only.
O
Output pin only.
I/O
Pin can be either an input or output.
–
Pin must be connected as described.
S
Synchronous. Inputs must meet setup and hold times relative to CLKIN for proper operation.
S(E) Edge sensitive input
S(L) Level sensitive input
A (...)
Asynchronous. Inputs may be asynchronous relative to CLKIN.
A(E) Edge sensitive input
A(L) Level sensitive input
R (...)
While the processor’s RESET pin is asserted, the pin:
R(1) is driven to V
CC
R(0) is driven to V
R(Q) is a valid output
R(X) is driven to unknown state
R(H) is pulled up to V
CC
H (...)
While the processor is in the hold state, the pin:
H(1) is driven to V
CC
H(0) is driven to V
H(Q) Maintains previous state or continues to be a valid output
H(Z) Floats
P (...)
While the processor is halted, the pin:
P(1) is driven to V
CC
P(0) is driven to V
P(Q) Maintains previous state or continues to be a valid output
相關(guān)PDF資料
PDF描述
A80960JD-40 EMBEDDED 32-BIT MICROPROCESSOR
A80960JF-33 EMBEDDED 32-BIT MICROPROCESSOR
A80960JD 3.3 V EMBEDDED 32-BIT MICROPROCESSOR
A80960JD-50 3.3 V EMBEDDED 32-BIT MICROPROCESSOR
A80960JD-66 3.3 V EMBEDDED 32-BIT MICROPROCESSOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A80960JD3V33 功能描述:IC MPU I960JD 3.3V 33MHZ 132-PGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤(pán)
A80960JD3V50 功能描述:IC MPU I960JD 3V 50MHZ 132-PGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤(pán)
A80960JD3V66 功能描述:IC MPU I960JD 3V 66MHZ 132-QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤(pán)
A80960JD-40 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR
A80960JD50 制造商:Rochester Electronics LLC 功能描述:- Bulk
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