參數(shù)資料
型號: AB28F400BR
廠商: Intel Corp.
英文描述: 5 V Automotive Boot Block Flash Memory(5V自引導塊閃速存儲器)
中文描述: 5伏汽車啟動塊閃存(5V的自引導塊閃速存儲器)
文件頁數(shù): 18/40頁
文件大小: 257K
代理商: AB28F400BR
AB28F200BR, AB28F400BR
E
18
ADVANCE INFORMATION
During erase suspend mode, the chip can go into a
pseudo-standby mode by taking CE# to V
IH
, which
reduces active current draw. V
PP
must remain at
V
PPH1
or V
PPH2
(the same V
PP
level used for block
erase) while erase is suspended. RP# must also
remain at V
IH
or V
HH
(the same RP# level used for
block erase).
To resume the erase operation, enable the chip by
taking CE# to V
IL
, then issue the Erase Resume
command, which continues the erase sequence to
completion. As with the end of a standard erase
operation, the status register must be read, cleared,
and the next instruction issued in order to continue.
Table 6. Command Codes and Descriptions
Code
Device Mode
Description
00
Invalid/
Reserved
Unassigned commands that should not be used. Intel reserves the right to redefine
these codes for future functions.
FF
Read Array
Places the device in read array mode, so that array data will be output on the data
pins.
40
Program
Set-Up
Sets the CUI into a state such that the next write will load the Address and Data
registers. The next
write after the Program Set-Up command will latch addresses
and data on the rising edge and begin the program algorithm. The device then
defaults to the read status mode, where the device outputs status register data
when OE# is enabled. To read the array, issue a Read Array command.
To cancel a program operation after issuing a Program Set-Up command, write all
1’s (FFH for x8, FFFFH for x16)
to the CUI. This will return to read status register
mode after a standard program time without modifying array contents. If a program
operation has already been initiated to the WSM this command cannot cancel that
operation in progress.
10
Alternate
Prog Set-Up
(See 40H/Program Set-Up)
20
Erase
Set-Up
Prepares the CUI for the Erase Confirm command. If the next command is not an
Erase Confirm command, then the CUI will set both the program status (SR.4) and
erase status (SR.5) bits of the status register to a “1,” place the device into the
read status register state, and wait for another command without modifying array
contents. This can be used to cancel an erase operation after the Erase Set-Up
command has been issued. If an operation has already been initiated to the WSM
this can not cancel that operation in progress.
D0
Erase
Resume/
Erase
Confirm
If the previous command was an Erase Set-Up command, then the CUI will latch
address and data, and begin erasing the block indicated on the address pins.
During erase, the device will respond only to the Read Status Register and Erase
Suspend commands and will output status register data when OE# is toggled low.
Status register data is updated by toggling either OE# or CE# low.
B0
Erase
Suspend
Issuing this command will begin to suspend erase operation. The status register
will indicate when the device reaches erase suspend mode. In this mode, the CUI
will respond only to the Read Array, Read Status Register, and Erase Resume
commands and the WSM will also set the WSM status bit to a “1” (ready). The
WSM will continue to idle in the SUSPEND state, regardless of the state of all input
control pins except RP#, which will immediately shut down the WSM and the
remainder of the chip, if it is made active. During a suspend operation, the data
and address latches will remain closed, but the address pads are able to drive the
address into the read path. See Section 3.2.5.1. This command is useful only while
an erase operation is in progress and may reset to read array mode in other
circumstances. (See Appendix A for state transition table.)
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