參數(shù)資料
型號(hào)： ACTS10HMSR
廠商： INTERSIL CORP
元件分類： 通用總線功能
英文描述： CAP .022UF 50V 10% X7R 0805
中文描述： ACT SERIES, TRIPLE 3-INPUT NAND GATE, UUC16
封裝： DIE-16
文件頁(yè)數(shù)： 1/8頁(yè)
文件大?。?/td> 112K
代理商： ACTS10HMSR
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
ACTS10MS
Radiation Hardened
Triple Three-Input NAND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C
TOP VIEW
14 LEAD CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C
TOP VIEW
A1
B1
A2
B2
C2
Y2
GND
VCC
C1
Y1
C3
B3
A3
Y3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
B1
A2
B2
C2
Y2
GND
VCC
C1
Y1
C3
B3
A3
Y3
Features
1.25 Micron Radiation Hardened SOS CMOS
Total Dose 300K RAD (Si)
Single Event Upset (SEU) Immunity
<1 x 10
-10
Errors/Bit-Day (Typ)
SEU LET Threshold >80 MEV-cm
2
/mg
Dose Rate Upset >10
11
RAD (Si)/s, 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to ALSTTL Logic
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2V Min
Input Current
≤
1
μ
A at VOL, VOH
Description
The Intersil ACTS10MS is a radiation hardened triple three-input
NAND gate. A high on all inputs forces the output to a low state.
The ACTS10MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
April 1995
Ordering Information
PART NUMBER
ACTS10DMSR
ACTS10KMSR
ACTS10D/Sample
ACTS10K/Sample
ACTS10HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
Truth Table
INPUTS
OUTPUT
An
Bn
Cn
Yn
L
L
L
H
L
L
H
H
L
H
L
H
L
H
H
H
H
L
L
H
H
L
H
H
H
H
L
H
H
H
H
L
NOTE: L = Logic Level Low, H = Logic Level High
Functional Diagram
An
Bn
Yn
(12, 6, 8)
(1, 3, 9)
(2, 4, 10)
(5, 11, 13)
Cn
Spec Number
518823
File Number
3631
相關(guān)PDF資料
PDF描述
ACTS112D Radiation Hardened Dual J-K Flip-Flop
ACTS112K ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86%
ACTS112MS Radiation Hardened Dual J-K Flip-Flop
ACTS112HMSR Radiation Hardened Dual J-K Flip-Flop
ACTS125D Radiation Hardened Quad Buffer, Three-State
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ACTS10K 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple Three-Input NAND Gate
ACTS10KMSR 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple Three-Input NAND Gate
ACTS10MS 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple Three-Input NAND Gate
ACTS112D 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual J-K Flip-Flop
ACTS112HMSR 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual J-K Flip-Flop
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*