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參數(shù)資料
| 型號(hào)： | AD1315KZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | High Speed Active Load with Inhibit Mode |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CDSO16 |
| 封裝： | HERMETIC SEALED, CERAMIC, LCC-16 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 247K |
| 代理商： | AD1315KZ |
AD1315
–4–
REV. A
DEFINITION OF TERMS
Gain
The measured transconductance.
Gain
=
I
OUT
(@ 5
V Input
)
I
OUT
(@ 0.2
V Input
)
V
PROG
(@ 5
V
)
V
PROG
(@ 0.2
V
)
where:
V
PROG
values are measured at I
OL
/I
OH
PROG
Gain Error
The difference between the measured transconductance and the
ideal expressed as a % of full-scale range.
Ideal Gain =
10
mA/V
Gain Error
=
IdealGain
Actual Gain
IdealGain
×
100
Offset Error
Offset Error is measured by setting the I
OHPROG
or I
OLPROG
inputs to 0.2 V and measuring I
OUT
. Since both I
OH
and I
OL
Figure 1. Definition of Terms
Figure 2. Timing Diagram for Inhibit Transition
outputs are unipolar, this small initial offset of 2 mA must be set
to allow for measurement of possible negative offset. With a gain
of 10 mA/V, a 0.2 V input should yield an output of
±
2 mA. The
difference between the observed output and the ideal
±
2 mA
output is the offset error.
Offset Error = I
OUT
(@
0.2
V) – Gain
3
V
PROG
(@
0.2
V)
Linearity Error
The deviation of the transfer function from a straight line de-
fined by Offset and Gain expressed as a % of FSR.
I
OUT
(calc) = Gain
3
V
PROG
(@ set point) + Offset
where:
set point = V
PROG
(from 0.2 V to 5 V)
I
OUT
(FSR) = Gain
3
V
PROG
(@
5
V) + Offset
Linearity ErrorI
OUT
(
measured
)
I
OUT
(
calc
)
I
OUT
(
FSR
)
×
100
Figure 3. I
OL
, I
OH
Offset Current vs.
Temperature
Figure 4. I
OL
, I
OH
Gain Error vs.
Temperature
Figure 5. I
OL
, I
OH
Linearity Error vs.
Current Program Voltage
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